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Lec Jobs in Texas (NOW HIRING)

Implement SystemVerilog Assertions (SVA) and run lint, CDC, and LEC flows to check design intent and keep blocks clean. * Participate in design reviews, presenting your design decisions and ...

Experience with scalable designs, DFT insertion, LEC, Lint and codeline management. Ability to debug and solve various design integration issues in a timely manner. Proficiency in logic design ...

Experience with scalable designs, DFT insertion, LEC, Lint and codeline management. Ability to debug and solve various design integration issues in a timely manner. Proficiency in logic design ...

Experience with RTL analysis and/or PPA optimization using Invio, LEC and Genus. Familiarity with GPU/CPU/SIMD Architecture and micro-architecture. Ability to work well in a team and be productive ...

Experience with RTL analysis and/or PPA optimization using Invio, LEC and Genus. Familiarity with GPU/CPU/SIMD Architecture and micro-architecture. Ability to work well in a team and be productive ...

Experience with RTL analysis and/or PPA optimization using Invio, LEC and Genus. Familiarity with GPU/CPU/SIMD Architecture and micro-architecture. Ability to work well in a team and be productive ...

Drive design quality and signoff through Lint, CDC/RDC, Formal Verification, LEC, synthesis, and timing validation * Collaborate with system, analog, verification, and physical design teams to define ...

... LEC and DFT Implementation workflows Build intelligent CAD tools that leverage GenAI for synthesis optimization and automated debugging Integrate agentic solutions with existing EDA tools (Fusion ...

... LEC and DFT Implementation workflows Build intelligent CAD tools that leverage GenAI for synthesis optimization and automated debugging Integrate agentic solutions with existing EDA tools (Fusion ...

Physical Synthesis CAD Engineer

Austin, TX ยท On-site

$134K - $138K/yr

... LEC and/or Formality is a plus Experience in linting, static timing analysis, low power checks (UPF) or place and route tools is a plus Proficiency with TCL, Python or Perl scripting languages ...

... LEC) tools Experience with Power analysis tools Experience with Static Timing Analysis Tools Deep understanding of power, performance and area tradeoffs Strong communication and ability to influence ...

Implement SystemVerilog Assertions (SVA) and run lint, CDC, and LEC flows to check design intent and keep blocks clean. * Participate in design reviews, presenting your design decisions and ...

... LEC) tools Experience with Power analysis tools Experience with Static Timing Analysis Tools Deep understanding of power, performance and area tradeoffs Strong communication and ability to influence ...

... LEC, DVS, etc.) Experience working on timing for 1 ghz+ designs, including how to handle multiple clock and power domains Experience with one of the following static timing tools: Primetime or Tempus ...

Physical Synthesis CAD Engineer

Austin, TX ยท On-site

$134K - $138K/yr

... LEC and/or Formality is a plus Experience in linting, static timing analysis, low power checks (UPF) or place and route tools is a plus Proficiency with TCL, Python or Perl scripting languages ...

Custom Circuits Design Verification Engineer

Austin, TX ยท On-site

$134K - $164K/yr

Knowledge of industry standard design tools, such as ESPCV and/or LEC. Knowledge of regression and revision control tools. DFT (ATPG/MBIST) knowledge is desirable. Minimum Qualifications BS degree ...

Showing results 21-40

Lec information

See Texas salary details

$15

$26

$38

How much do lec jobs pay per hour?

As of Sep 5, 2026, the average hourly pay for lec in Texas is $26.82, according to ZipRecruiter salary data. Most workers in this role earn between $22.84 and $29.33 per hour, depending on experience, location, and employer.

What is a lec?

Lecturers are academic professionals who teach courses at universities, colleges, or other higher education institutions. They are primarily responsible for delivering lectures, designing course materials, assessing student performance, and sometimes engaging in research or administrative duties. Unlike professors, lecturers may not have permanent tenure and may focus more on teaching than on research. The specific duties and qualifications required can vary depending on the institution and country.

What are the key skills and qualifications needed to thrive as a lec, and why are they important?

To thrive as a Lecturer, you typically need advanced subject knowledge, a relevant postgraduate degree (often a PhD or master's), and experience in teaching or research. Familiarity with learning management systems (LMS) like Moodle or Blackboard, and digital presentation tools is important. Outstanding communication, adaptability, and student engagement skills help Lecturers connect with diverse learners and facilitate effective learning. These competencies are essential for delivering quality education, fostering student success, and contributing to the academic community.

What are some common challenges new lecs face when transitioning from academia to teaching, and how can they overcome them?

New lecturers often find the transition from being a student or researcher to teaching full-time challenging, particularly when it comes to balancing course preparation, grading, and research responsibilities. Additionally, engaging students with diverse learning needs and managing large class sizes can be demanding. To overcome these challenges, new lecturers can seek mentorship from experienced colleagues, participate in teaching workshops, and use university-supported resources for instructional design and classroom management. Building strong communication with students and continually reflecting on teaching practices also helps improve effectiveness and confidence in the role.

What is the difference between Lec vs Teacher?

AspectLecTeacher
CredentialsTypically requires a degree or certification in the subject areaUsually requires a degree, teaching certification, or license
Work EnvironmentOften in online platforms, corporate training, or specialized institutionsIn schools, colleges, or educational institutions
Industry UsageCommon in e-learning, corporate training, and higher educationPrimarily in K-12 and higher education settings
Search & Comparison IntentPeople compare Lec vs Teacher to understand roles, qualifications, and job scopePeople look up Teacher to find job requirements and responsibilities

While both Lec and Teacher roles involve education and training, Lec often refers to online or specialized instruction, whereas Teacher typically denotes traditional classroom teaching. Understanding these differences helps job seekers identify the right opportunities based on credentials, environment, and industry context.

What cities in Texas are hiring for Lec jobs?

Cities in Texas with the most Lec job openings:

Infographic showing various Lec job openings in Texas as of August 2026, with employment types broken down into 74% Full Time, 15% Part Time, and 11% Contract. Highlights an 94% Physical, 3% Hybrid, and 3% Remote job distribution, with an average salary of $55,778 per year, or $26.8 per hour.

Senior Hardware Design Engineer

SambaNova

Austin, TX โ€ข On-site

Full-time

Posted 18 days ago


Job description

About the team

The hardware design team writes the RTL for SambaNova's RDU, the processor behind our AI workload acceleration systems, covering the compute, memory, and networking subsystems. Engineers own specific blocks inside a larger subsystem, working alongside the principal engineers and architects who set its direction. A block stays with the engineer who wrote it through PPA closure, tapeout, and bring-up, so you debug your own design in silicon.

About the role

SambaNova Senior Hardware Design Engineers design component units of the Reconfigurable Dataflow Unit (RDU) ASICs deployed in our AI workload acceleration systems. You will work alongside principal engineers, architects, design verification engineers, and physical design engineers to implement innovative features in hardware that provide unique value to SambaNova.

In this role you will take ownership of blocks within a larger subsystem - contributing sections of the microarchitecture specification, writing and debugging the RTL, and carrying your blocks through implementation, tapeout, and silicon bring-up. You will grow your scope over time as you build depth in our architecture.

This role is onsite, based in either our San Jose, CA or Austin, TX office.

Responsibilities

Some of your responsibilities will include...

  • Work with principal engineers and architects to author sections of the microarchitecture specification for compute, memory, or networking subsystems.
  • Code, integrate, and debug SystemVerilog RTL for assigned blocks through the chip implementation and production lifecycle.
  • Meet Power, Performance, and Area (PPA) targets for your blocks using advanced digital design techniques for high-speed design.
  • Partner with design verification and physical design engineers to converge on functionality, timing, and area.
  • Implement SystemVerilog Assertions (SVA) and run lint, CDC, and LEC flows to check design intent and keep blocks clean.
  • Participate in design reviews, presenting your design decisions and incorporating feedback.
  • Support post-silicon bring-up and debug for the blocks you own.
  • Contribute to design flow improvements, including AI and automation in EDA tool methodologies.
Required qualifications
  • Master's degree in Computer Engineering or Electrical Engineering with 3-5 years of relevant experience, or Bachelor's degree with 5-7 years.
  • Solid foundation in computer architecture and digital logic design.
  • Strong SystemVerilog RTL design skills for high-speed, high-performance ASICs.
  • Experience making design decisions that trade off Power, Performance, and Area (PPA).
  • Working knowledge of industry-standard interconnects and protocols (e.g., AXI, PCIe, Ethernet, HBM/DDR).
  • Experience with digital logic synthesis tools and Static Timing Analysis (STA).
  • Proficiency with industry-standard tools for linting, Clock Domain Crossing (CDC), and Logical Equivalence Checking (LEC).
  • Experience implementing SystemVerilog Assertions (SVA) to check design intent.
  • Familiarity with tools and simulators for hardware performance analysis and tuning.
  • Familiarity with Git for managing release cycles.
  • Scripting skills in Python and Linux shell.
  • Ability to work onsite in San Jose, CA or Austin, TX.
Preferred qualifications
  • Exposure to a full ASIC development cycle through tapeout and production silicon.
  • Interest in or knowledge of AI workload acceleration techniques.
  • Experience with low-power design techniques (clock gating, DVFS) at advanced process nodes.
  • Exposure to emulation or FPGA prototyping platforms for pre-silicon validation.
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