We are seeking a motivated RFIC Design Engineer Intern to support the development, simulation, and ... Support layout reviews, parasitic extraction, and post-layout simulations. * Assist in the analysis ...
New
We are seeking a motivated RFIC Design Engineer Intern to support the development, simulation, and ... Support layout reviews, parasitic extraction, and post-layout simulations. * Assist in the analysis ...
New
We are seeking a motivated RFIC Design Engineer Intern to support the development, simulation, and ... Support layout reviews, parasitic extraction, and post-layout simulations. * Assist in the analysis ...
New
San Jose, CA · On-site
Job Summary As a Signal Integrity / Power Integrity Intern, you will help design and validate the ... Design Collaboration * Partner with PCB layout, package, hardware, and ASIC teams to improve signal ...
San Jose, CA · On-site
Job Summary As a Signal Integrity / Power Integrity Intern, you will help design and validate the ... Design Collaboration * Partner with PCB layout, package, hardware, and ASIC teams to improve signal ...
San Jose, CA · On-site
Job Summary As a Signal Integrity / Power Integrity Intern, you will help design and validate the ... Design Collaboration * Partner with PCB layout, package, hardware, and ASIC teams to improve signal ...
Quick apply
San Jose, CA · On-site
Job Summary As a Signal Integrity / Power Integrity Intern, you will help design and validate the ... Design Collaboration * Partner with PCB layout, package, hardware, and ASIC teams to improve signal ...
$19.75 - $25.50/hr
Harness Design Engineer Intern (Fall 2026) Internships at Astranis typically last for twelve weeks ... Create wiring diagrams, block diagrams, schematics, and layout drawings of spacecraft harnessing
$19.75 - $25.50/hr
Harness Design Engineer Intern (Fall 2026) Internships at Astranis typically last for twelve weeks ... Create wiring diagrams, block diagrams, schematics, and layout drawings of spacecraft harnessing
San Francisco, CA · On-site
$29/hr
Harness Design Engineer Intern (Fall 2026) Internships at Astranis typically last for twelve weeks ... Create wiring diagrams, block diagrams, schematics, and layout drawings of spacecraft harnessing
San Francisco, CA · On-site
$29/hr
Harness Design Engineer Intern (Fall 2026) Internships at Astranis typically last for twelve weeks ... Create wiring diagrams, block diagrams, schematics, and layout drawings of spacecraft harnessing
The Analog and Mixed-Signal IC Design Engineer Intern will be responsible for analog and mixed-signal chip design, from circuit design to layout and verification. * Define and implement innovative ...
The Analog and Mixed-Signal IC Design Engineer Intern will be responsible for analog and mixed-signal chip design, from circuit design to layout and verification. * Define and implement innovative ...
$159K - $164K/yr
Qualifications Minimum: • MS in EE/CS with 8-10 years of previous experience. • Exposure on ASIC design, layout, and semiconductor device/process through previous work/intern experience or course ...
$159K - $164K/yr
Qualifications Minimum: • MS in EE/CS with 8-10 years of previous experience. • Exposure on ASIC design, layout, and semiconductor device/process through previous work/intern experience or course ...
San Francisco, CA · On-site
$40 - $60/hr
... PCB layout design process, and DFM reviews -considering mass production readiness- with vendors and external manufacturing partners * Integrate antennas into complete device form factor by ...
San Francisco, CA · On-site
$40 - $60/hr
... PCB layout design process, and DFM reviews -considering mass production readiness- with vendors and external manufacturing partners * Integrate antennas into complete device form factor by ...
The Analog and Mixed-Signal IC Design Engineer Intern will be responsible for analog and mixed-signal chip design, from circuit design to layout and verification. * Define and implement innovative ...
The Analog and Mixed-Signal IC Design Engineer Intern will be responsible for analog and mixed-signal chip design, from circuit design to layout and verification. * Define and implement innovative ...
Write application notes, design notes, and articles. * Work in an office, or lab, 3 days per week ... Experience with schematic capture and PCB layout. * 3rd year BSEE or 4th year MSEE student.
Write application notes, design notes, and articles. * Work in an office, or lab, 3 days per week ... Experience with schematic capture and PCB layout. * 3rd year BSEE or 4th year MSEE student.
San Francisco, CA · On-site
$22.50 - $29.50/hr
You care about aesthetics and design inside out. If it's not the best product ever, it bothers you ... Understanding of PCB layout best practices for mixed-signal designs: ground plane management, power ...
San Francisco, CA · On-site
$22.50 - $29.50/hr
You care about aesthetics and design inside out. If it's not the best product ever, it bothers you ... Understanding of PCB layout best practices for mixed-signal designs: ground plane management, power ...
San Jose, CA · On-site
$42 - $55/hr
Write application notes, design notes, and articles. * Work in an office, or lab, 3 days per week ... Experience with schematic capture and PCB layout. * 3rd year BSEE or 4th year MSEE student.
San Jose, CA · On-site
$42 - $55/hr
Write application notes, design notes, and articles. * Work in an office, or lab, 3 days per week ... Experience with schematic capture and PCB layout. * 3rd year BSEE or 4th year MSEE student.
San Jose, CA · On-site
$40 - $45/hr
We are looking for an Electrical Engineering Intern to support the design and test of critical ... Experience with design automation (EDA) tools, preferably Altium in both schematics and layout.
San Jose, CA · On-site
$40 - $45/hr
We are looking for an Electrical Engineering Intern to support the design and test of critical ... Experience with design automation (EDA) tools, preferably Altium in both schematics and layout.
We are looking for an Electrical Engineering Intern to support the design and test of critical ... Experience with design automation (EDA) tools, preferably Altium in both schematics and layout.
We are looking for an Electrical Engineering Intern to support the design and test of critical ... Experience with design automation (EDA) tools, preferably Altium in both schematics and layout.
South San Francisco, CA · On-site
$35/hr
As an Electrical Engineering Intern you'll own meaningful projects and make substantial ... All phases of board design (part selection, schematic design, layout, and bring-up) * Custom motor ...
South San Francisco, CA · On-site
$35/hr
As an Electrical Engineering Intern you'll own meaningful projects and make substantial ... All phases of board design (part selection, schematic design, layout, and bring-up) * Custom motor ...
San Francisco, CA · On-site
$22.50 - $29.50/hr
Contribute to PCBA design and validation for robot subsystems including power distribution, motor ... Support schematics and layout work through fabrication and bring-up, iterating quickly based on ...
San Francisco, CA · On-site
$22.50 - $29.50/hr
Contribute to PCBA design and validation for robot subsystems including power distribution, motor ... Support schematics and layout work through fabrication and bring-up, iterating quickly based on ...
San Jose, CA · On-site
$19.75 - $25.50/hr
... product design, qualify replacement components, improve product quality, improve customer ... Develops and implements production tooling, test fixtures, equipment, and work cell layout.
San Jose, CA · On-site
$19.75 - $25.50/hr
... product design, qualify replacement components, improve product quality, improve customer ... Develops and implements production tooling, test fixtures, equipment, and work cell layout.
... Intern will contribute to process improvement, operational efficiency gains, project delivery, and ... Identify, design and execute line layout and process improvements. * Perform various test functions ...
... Intern will contribute to process improvement, operational efficiency gains, project delivery, and ... Identify, design and execute line layout and process improvements. * Perform various test functions ...
San Jose, CA · On-site
$24/hr
... Intern will contribute to process improvement, operational efficiency gains, project delivery, and ... Identify, design and execute line layout and process improvements. * Perform various test functions ...
San Jose, CA · On-site
$24/hr
... Intern will contribute to process improvement, operational efficiency gains, project delivery, and ... Identify, design and execute line layout and process improvements. * Perform various test functions ...
Write application notes, design notes, and articles. * Work in office, or lab, 3 days per week as ... Experience with schematic capture and PCB layout * 3rd year BSEE or 4th year MSEE student * Must be ...
Write application notes, design notes, and articles. * Work in office, or lab, 3 days per week as ... Experience with schematic capture and PCB layout * 3rd year BSEE or 4th year MSEE student * Must be ...
$10.21 - $13.02
9% of jobs
$13.02 - $15.83
8% of jobs
$16.55 is the 25th percentile. Wages below this are outliers.
$15.83 - $18.63
28% of jobs
The median wage is $19.38 / hr.
$18.63 - $21.44
16% of jobs
$23.36 is the 75th percentile. Wages above this are outliers.
$21.44 - $24.25
20% of jobs
$24.25 - $27.06
9% of jobs
$27.06 - $29.87
4% of jobs
$29.87 - $32.68
1% of jobs
$32.68 - $35.48
1% of jobs
$35.48 - $38.29
1% of jobs
$38.29 - $41.10
2% of jobs
$10
$21
$41
| Aspect | Layout Design Intern | Graphic Design Intern |
|---|---|---|
| Required Skills | Knowledge of layout principles, design software, basic typography | Creative skills, proficiency in graphic design tools, visual communication |
| Work Environment | Design studios, advertising agencies, publishing companies | Marketing firms, media companies, advertising agencies |
| Typical Tasks | Creating page layouts, arranging visual elements, assisting in print/digital publications | Developing visual concepts, designing logos, creating marketing materials |
While both roles involve design work, a Layout Design Intern primarily focuses on arranging visual elements within layouts for publications or digital media, whereas a Graphic Design Intern works on broader visual concepts, branding, and marketing materials. Both positions often require familiarity with design software and are common entry points in creative industries.

Full-time
Posted 2 days ago
We are seeking a motivated RFIC Design Engineer Intern to support the development, simulation, and validation of RF integrated circuits for next-generation wireless and satellite communications applications. This internship is ideal for a student with strong fundamentals in analog/RF circuit design who wants hands-on experience working with experienced RFIC engineers on real product development and help push new hardware innovations forward.
Responsibilities
As an RFIC Design Engineer Intern, you will:
We are considering full-time/ part-time applicants for Summer 2026 (8-10 weeks) and Fall 2026 (10-14 weeks).
The ideal candidate will have strong technical competency, curiosity, and the ability to take the lead and ownership of a well-defined project. They should also be excited to adapt, learn quickly, and grow in a fast-paced startup environment.
Requirements
Benefits