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Junior Rtl Design Engineer Jobs in Spartanburg, SC

AERONIX INC

Senior FPGA Design Engineer

Greenville, SC · On-site

$145K - $175K/yr

... junior engineers and contribute to technical reviews. REQUIRED SKILLS * Strong proficiency in RTL ... Proficiency in FPGA Block Design development and debugging (e.g., Vivado, Libero). * Familiarity ...

AERONIX INC

Senior FPGA Design Engineer

Greenville, SC · On-site

$145K - $175K/yr

... junior engineers and contribute to technical reviews. REQUIRED SKILLS * Strong proficiency in RTL ... Proficiency in FPGA Block Design development and debugging (e.g., Vivado, Libero). * Familiarity ...

Fluor

Principal Electrical Design Engineer

Greenville, SC · On-site

$130K - $159K/yr

At Fluor, we are proud to design and build projects and careers. We are committed to fostering a ... mentor junior engineers Preferred Qualifications FEL 1 through 3 experience in an EPC/EPCM ...

Mantx LLC

Junior Software Developer

Taylors, SC · On-site

$50K/yr

MANTX -- JUNIOR SOFTWARE DEVELOPER Mantx is a fast-growing software startup building a modern ... AI engineer. You'll learn how we design, build, and ship production software, and how to use AI ...

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Junior Rtl Design Engineer information

See Spartanburg, SC salary details

$32.7K

$70.2K

$107K

How much do junior rtl design engineer jobs pay per year?

As of Aug 29, 2026, the average yearly pay for junior rtl design engineer in Spartanburg, SC is $70,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $47,400.00 and $78,200.00 per year, depending on experience, location, and employer.

What is a junior RTL design engineer?

Junior RTL Design Engineers are entry-level professionals who work on designing and verifying the Register Transfer Level (RTL) logic for digital integrated circuits. They typically use hardware description languages like Verilog or VHDL to describe and simulate the functionality of hardware blocks according to specifications. Their responsibilities often include coding, simulation, debugging, and collaborating with senior engineers to ensure the design meets performance and functional requirements. This role is crucial in the process of creating chips and digital systems used in various electronic devices.

What are the key skills and qualifications needed to thrive as a junior RTL design engineer?

To thrive as a Junior RTL Design Engineer, a solid background in digital logic design, hardware description languages (such as Verilog or VHDL), and a relevant engineering degree are essential. Experience with simulation and synthesis tools (like ModelSim, Synopsys, or Xilinx Vivado) and a basic understanding of ASIC or FPGA flows are typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help individuals excel in translating specifications into efficient hardware designs. These skills ensure accurate, reliable, and high-performance digital circuit development, which is crucial for meeting project goals and industry standards.

What are some common challenges faced by junior RTL design engineers when transitioning from academic projects to industry roles?

Junior RTL Design Engineers often find the transition from academic projects to industry roles challenging due to the increased complexity and scale of commercial designs. In industry, there is a strong emphasis on meeting strict timing, power, and area requirements, as well as adhering to rigorous verification and documentation standards. Collaboration with verification, physical design, and software teams is essential, and juniors may need to quickly adapt to using industry-standard EDA tools and workflows. Gaining proficiency in debugging and understanding legacy codebases are also typical hurdles. However, most teams provide mentorship and structured onboarding to help new engineers succeed.

What is the difference between Junior Rtl Design Engineer vs Digital Design Engineer?

AspectJunior Rtl Design EngineerDigital Design Engineer
Required CredentialsBachelor's in Electrical Engineering or related field; some certificationsBachelor's or higher in Electrical/Electronic Engineering; certifications vary
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
Employer & Industry UsageCommonly employed in chip design, FPGA, ASIC developmentUsed in digital circuit and system design across industries

Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.

What are popular job titles related to Junior Rtl Design Engineer jobs in Spartanburg, SC?

For Junior Rtl Design Engineer jobs in Spartanburg, SC, the most frequently searched job titles are:

What job categories do people searching Junior Rtl Design Engineer jobs in Spartanburg, SC look for?

The top searched job categories for Junior Rtl Design Engineer jobs in Spartanburg, SC are:

Junior Rtl Design Engineer jobs near you

Senior FPGA Design Engineer

Greenville, SC • On-site

AERONIX INC
Manufacturing • 51 - 200 employees
Learn more about AERONIX INCexternal

$145K - $175K/yr

Full-time

Re-posted 8 days ago

Job description


Job Title: Senior FPGA Engineer
Department: Engineering
Reports To: Functional Team Lead / Program Manager
FLSA Status: Exempt / Full-time

Salary Range:   $145k - $175k Annually

DoD Secret clearance (or higher) REQUIRED.


ROLE

We are seeking a Senior FPGA Design Engineer with at least 10 years of experience to develop the architecture, implementation, and verification of complex, high-speed FPGA solutions. The ideal candidate will have deep expertise in high-bandwidth interfaces such as PCIe Gen4/5, 10 to 100G+ Ethernet, and DDR4/DDR5, along with strong skills in RTL design (VHDL/Verilog/ SystemVerilog), timing closure, and signal integrity. Experience with Cryptography, DSP and RF applications is strong plus. This role involves driving FPGA design from concept through production, integrating vendor IP, optimizing for low latency and high throughput, and performing rigorous verification and lab validation. The engineer will collaborate across hardware and software teams, mentor junior engineers, and ensure designs meet stringent reliability and compliance standards.

RESPONSIBILITIES

  • Lead full life-cycle FPGA development, from requirements and architecture through RTL implementation (Verilog/VHDL), verification, and system integration across multiple FPGA families. 
  • Define and document FPGA architecture, including block diagrams, clocking strategies, and trade-off analyses; participate in and conduct design reviews. 
  • Develop robust, reusable, and self-checking testbenches; implement functional coverage models and achieve code coverage closure. 
  • Create and execute detailed test plans, procedures, and reports; ensure verification rigor and traceability. 
  • Collaborate with hardware and software teams to integrate FPGA designs at the board and system level; support lab bring-up, debug, and qualification testing. 
  • Implement and validate JTAG boundary scan and other DFT features; ensure compliance with design-for-test and reliability standards. 
  • Drive continuous improvement in design practices, coding standards, and verification methodologies; mentor junior engineers and contribute to technical reviews.

REQUIRED SKILLS

  • Strong proficiency in RTL design using Verilog/VHDL, including custom implementations beyond vendor IP integration.
  • Strong experience in testbench development, functional coverage, and verification of complex FPGA designs. 
  • Proficient with FPGA simulation and synthesis tools (e.g., QuestaSim, ModelSim, Riviera-PRO, Xilinx Vivado, Intel Quartus).
  • Proficiency of FPGA architecture and optimization techniques for timing closure, floor-planning, and resource utilization.
  • Ability to perform FPGA power estimation and analysis using vendor tools and optimize designs for power and thermal constraints.
  • Strong understanding of high-speed interfaces (PCIe, Ethernet, Serial RapidIO, DDRx) and control protocols (I²C, SPI, RS-232/422). 
  • Experience with System-on-Chip technologies.

PREFERRED SKILLS

  • Proficiency in FPGA Block Design development and debugging (e.g., Vivado, Libero).
  • Familiarity with Universal Verification Methodology (UVM).
  • Familiarity with Microsemi Libero and Lattus Diamond.
  • Familiarity with revision control systems (Git/Bitbucket) and scripting in Python, TCL, or Linux shell for automation. 
  • Skilled in FPGA lab validation using oscilloscopes, logic analyzers, and protocol analyzers. 
  • Support JTAG Boundary scan design and testing
  • Experience with Cryptography, Digital Signal Processing and RF Applications
  • MATLAB modeling
  • Strong oral and written communication skills, with ability to document and present technical work clearly. 
  • Experience collaborating in Agile environments and using tools like Jira and requirements management systems (e.g., Jama).
  • Familiarity with Manufacturing processes, and Electronic Stress Screening.
  • Understanding of formal verification processes and compliance standards.

QUALIFICATIONS

  • Bachelor’s Degree in Electrical Engineering, Computer Engineering, or related field.
  • Minimum 10 years of relevant experience in FPGA design.
  • Excellent written and verbal communication skills.
  • Ability to work in a collaborative team environment.
  • DoD Secret clearance (or higher) REQUIRED.
  • Position located in Melbourne, FL or Greenville, SC (not remote).


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