Digital IC Design Engineer Intern
Fremont, CA · On-site
$35/hr
Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low ... Temporary Employees & Interns excluded
Fremont, CA · On-site
$35/hr
Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low ... Temporary Employees & Interns excluded
Fremont, CA · On-site
$35/hr
Micro-architecture design and RTL implementation of: * Low-power digital signal processors * Low ... Temporary Employees & Interns excluded
... interns may be considered for their flair). * Hands-on experience in a semiconductor or EDA ... SPECIALTY: DI (Design Integration, RTL, Architecture) * Proven track record of developing ...
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... interns may be considered for their flair). * Hands-on experience in a semiconductor or EDA ... SPECIALTY: DI (Design Integration, RTL, Architecture) * Proven track record of developing ...
FPGA Intern (Fall 2026) Internships at Astranis typically last for twelve weeks, and are hourly ... RTL Development for FPGA targeted applications * Work with multiple FPGAs and toolchains
FPGA Intern (Fall 2026) Internships at Astranis typically last for twelve weeks, and are hourly ... RTL Development for FPGA targeted applications * Work with multiple FPGAs and toolchains
San Francisco, CA · On-site
Required : • Demonstrated ability to build and maintain software (projects, internships, research ... design concepts and the ability to read RTL (Verilog/SystemVerilog) or equivalent hardware ...
San Francisco, CA · On-site
Required : • Demonstrated ability to build and maintain software (projects, internships, research ... design concepts and the ability to read RTL (Verilog/SystemVerilog) or equivalent hardware ...
San Francisco, CA · On-site
$29/hr
FPGA Intern (Fall 2026) Internships at Astranis typically last for twelve weeks, and are hourly ... RTL Development for FPGA targeted applications * Work with multiple FPGAs and toolchains
San Francisco, CA · On-site
$29/hr
FPGA Intern (Fall 2026) Internships at Astranis typically last for twelve weeks, and are hourly ... RTL Development for FPGA targeted applications * Work with multiple FPGAs and toolchains
San Francisco, CA · On-site
$225K - $445K/yr
Demonstrated ability to build and maintain software (projects, internships, research, open source ... Familiarity with digital design concepts and the ability to read RTL (Verilog/SystemVerilog) or ...
San Francisco, CA · On-site
$225K - $445K/yr
Demonstrated ability to build and maintain software (projects, internships, research, open source ... Familiarity with digital design concepts and the ability to read RTL (Verilog/SystemVerilog) or ...
$7.39 - $9.06
2% of jobs
$9.06 - $10.74
3% of jobs
$10.74 - $12.42
2% of jobs
$12.42 - $14.10
3% of jobs
$14.10 - $15.78
8% of jobs
$16.10 is the 25th percentile. Wages below this are outliers.
$15.78 - $17.46
32% of jobs
$17.46 - $19.14
15% of jobs
$20.55 is the 75th percentile. Wages above this are outliers.
$19.14 - $20.81
12% of jobs
$20.81 - $22.49
15% of jobs
$22.49 - $24.17
7% of jobs
$24.17 - $25.85
1% of jobs
$7
$17
$25
To thrive as an RTL Design Intern, you need a solid understanding of digital design concepts, hardware description languages like Verilog or VHDL, and enrollment in or completion of a degree in electrical or computer engineering. Familiarity with simulation tools such as ModelSim or Synopsys VCS, and basic knowledge of EDA tools and version control systems, is typically expected. Strong analytical skills, attention to detail, and effective communication are highly valued soft skills in this role. These skills ensure you can efficiently contribute to design teams, troubleshoot issues, and communicate technical concepts clearly, all of which are critical for successful hardware development.
As an RTL Design Intern, you will usually assist with the design, implementation, and verification of digital circuits using hardware description languages. Your daily work may include writing RTL code, debugging simulation results, collaborating with senior engineers, and participating in code and design reviews. You’ll also help with testbench creation, documentation, and possibly automate design tasks to support the larger engineering team. The role offers valuable hands-on experience and insight into the full design cycle, making it a great learning opportunity for those interested in digital hardware engineering.
An Internship in RTL (Register Transfer Level) Design involves working on digital circuit design using hardware description languages like Verilog or VHDL. Interns assist in designing, simulating, and verifying digital circuits, ensuring they meet performance and power requirements. They often work with FPGA or ASIC teams to validate designs and optimize hardware implementations. This role provides hands-on experience in hardware development and exposure to industry-standard tools like Synopsys, Cadence, or Xilinx.
$35/hr
Full-time, Internship
Medical, Dental, Vision, Retirement
Re-posted 17 days ago
Sourced by ZipRecruiter
Biotechnology research and development
201 - 500 Employees
San Francisco, CA, US
2016