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Internship Rfic Design Engineer Jobs in Virginia

Physical Design Engineer

Bristol, VA · On-site

$80 - $120/hr

As a Physical Design Engineer, you will support the implementation of complex IC physical designs ... internships. * Familiarity with EDA tools for place & route, STA, and sign‑off. * Basic ...

Civil Design Engineer

Radford, VA · On-site

$63K - $79K/yr

Are you an aspiring or junior engineer looking to build a versatile foundation in civil design ... Any academic coursework, internships, or prior work experience in water and wastewater systems is ...

VDC Engineer

Richmond, VA · On-site

$81 - $96/hr

... internships) and a degree in Construction, Design or Engineering related fields. * Exposure to or interest in technology, 3D modeling, process development and software. * Strong organizational ...

New

The rest is design work alongside senior engineers, starting with cables, harnesses, and PCB layout ... New graduates are encouraged to apply - internships, co-ops, capstone projects, competition teams ...

Posted today

Quality Engineer

Tysons Corner, VA

$72K - $93K/yr

You will work closely with Product Management, Software Engineering, UX Design, DevOps, and Support ... Internship, academic, or personal project experience related to QA, automation, or software ...

By submitting your interest, you'll be among the first to know when internship opportunities open ... Participating on an Agile Scrum team, collaborating across design, development, and testing

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Showing results 1-20

Internship Rfic Design Engineer information

What is the difference between Internship Rfic Design Engineer vs RFIC Design Engineer?

AspectInternship RFIC Design EngineerRFIC Design Engineer
QualificationsEnrolled in or recent graduate of electrical engineering or related fieldBachelor's or master's in electrical engineering, with specialized RFIC knowledge
Work EnvironmentInternship programs, entry-level projects, supervised tasksFull-time professional role, independent project work, team collaboration
ResponsibilitiesAssisting in RFIC design tasks, learning industry tools, supporting senior engineersDesigning, testing, and optimizing RFICs for communication systems

The main difference between an Internship RFIC Design Engineer and an RFIC Design Engineer lies in experience, responsibilities, and career stage. Internships are designed for students or recent graduates gaining industry exposure, while RFIC Design Engineers are experienced professionals responsible for full project execution.

What are the most commonly searched types of Rfic Design Engineer jobs in Virginia?

The most popular types of Rfic Design Engineer jobs in Virginia are:

Infographic showing various Internship Rfic Design Engineer job openings in Virginia as of August 2026, with employment types broken down into 81% Full Time, 16% Part Time, and 3% Contract. Highlights an 82% Physical, 5% Hybrid, and 13% Remote job distribution.

Physical Design Engineer

Fractile

Bristol, VA • On-site

$80 - $120/hr

Other

Posted 13 days ago


Job description

Fractile’s mission is to enable a new chapter in the AI revolution. We’re pioneering AI innovation where hardware and software join to create something extraordinary, unlocking the power of the world’s largest language models with speed increases of x100. Our team is rapidly expanding, and we're searching for visionary engineers, scientists, and thinkers who share our passion for pushing boundaries and redefining what's possible. If you're ready to join a dynamic group of innovators shaping AI's future, we want to hear from you!

We are seeking a Physical Design Engineer to contribute to our next‑generation chip designs. As a Physical Design Engineer, you will support the implementation of complex IC physical designs, from synthesis to sign‑off. You will collaborate with cross‑functional teams, including logic design, verification, and process technology, to optimise performance, power, and area (PPA) while ensuring design integrity and manufacturability.

Key Responsibilities:
  • Support the physical implementation of ASIC/SoC designs, including floor planning, placement, clock tree synthesis (CTS), routing, and sign‑off.
  • Work on synthesis, timing analysis (STA), and optimisation to achieve strong PPA metrics.
  • Assist in power planning and analysis, addressing IR drop, electromigration, and related effects.
  • Ensure design rule check (DRC), layout vs. schematic (LVS), and other physical verification compliance.
  • Collaborate with DFT engineers to integrate design‑for‑test (DFT) structures into the physical implementation.
  • Develop flows in EDA tools such as Cadence Innovus, Synopsys Fusion Compiler, Mentor Graphics Calibre, and others.
  • Work closely with RTL and architecture teams to support design feasibility, constraints, and physical‑aware RTL design.
  • Work with advanced AI tools and models to improve productivity, analysis, and design quality.
Preferred Qualifications:
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • 0–5 years of experience in physical design for advanced technology nodes (e.g., 7nm, 5nm, or below), including internships.
  • Familiarity with EDA tools for place & route, STA, and sign‑off.
  • Basic understanding of CMOS technology, semiconductor physics, and process limitations.
  • Exposure to timing closure, signal integrity, IR drop analysis, and formal verification.
  • Proficiency in scripting languages like TCL, Perl, or Python for automation is a plus.
  • Excellent problem‑solving skills, communication, and teamwork in a collaborative design environment.
  • Interest in working with advanced AI tools and models as part of the design workflow.
  • Experience or coursework in high‑performance computing (HPC), AI accelerators, or networking chips is a plus.
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