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Internship Remote Linux Engineer Jobs in Fairfield, CT

Senior FPGA Design Engineer

Yorktown Heights, NY ยท Remote

$125K - $173K/yr

Remote Duration: 12+ Months Contract Job Summary: Research team has a need for an Electrical ... Familiarity with Linux. * Experience writing Python scripts. * Other: Show initiative by reading ...

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Internship Remote Linux Engineer information

See Fairfield, CT salary details

$13

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How much do internship remote linux engineer jobs pay per hour?

As of Aug 6, 2026, the average hourly pay for internship remote linux engineer in Fairfield, CT is $25.92, according to ZipRecruiter salary data. Most workers in this role earn between $21.06 and $29.42 per hour, depending on experience, location, and employer.

What is the difference between Internship Remote Linux Engineer vs Remote Linux Engineer?

AspectInternship Remote Linux EngineerRemote Linux Engineer
CredentialsBasic Linux knowledge, possibly ongoing educationProven Linux skills, certifications like CompTIA Linux+ or LPIC
Work EnvironmentInternship, learning-focused, entry-level tasksFull-time remote role, responsible for system management
Employer UsageInternship programs, training rolesOperational roles in companies, supporting infrastructure

The main difference is that an Internship Remote Linux Engineer is an entry-level, learning-focused position often held by students or recent graduates, while a Remote Linux Engineer is a full-time professional responsible for managing Linux systems remotely. Internships serve as training opportunities, whereas full-time roles require proven skills and experience.

What cities near Fairfield, CT are hiring for Internship Remote Linux Engineer jobs? Cities near Fairfield, CT with the most Internship Remote Linux Engineer job openings:
Infographic showing various Internship Remote Linux Engineer job openings in Fairfield, CT as of August 2026, with employment types broken down into 85% Full Time, 10% Part Time, 1% Temporary, and 4% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $53,905 per year, or $25.9 per hour.

Senior FPGA Design Engineer

Hirekeyz Inc

Yorktown Heights, NY โ€ข Remote

$125K - $173K/yr

Contractor

Re-posted 17 days ago


Job description

Role: Senior FPGA Design Engineer

Location: Remote

Duration: 12+ Months Contract

Job Summary:

Research team has a need for an Electrical Engineer highly experienced in the design and implementation of complex functions and solutions in FPGAs. Candidates must have an extensive knowledge of Verilog or VHDL;  they must possess the skills and experience customizing and integrating third-party IP, executing timing driven synthesis, running simulations, and performing design validation. Strong candidates will have design experience or a proficient understanding of the PCIe or Interlaken interface standards. Knowledge and fluency designing Xilinx FPGAs using the Vivado Design Suite is highly desirable.

  

Job Duties:

  • Job Duty 1 – Design (and implement) PCIe-to-Interlaken section of the Host FPGA Data Path. Interlaken is IP licensed from third-party.
  • Job Duty 2 -  Work with ASIC team to implement Host FPGA Interlaken interface to the ASIC’s Interlaken interface.
  • Job Duty 3 -  Work with Software team and Electronics Design team to test and verify functionality of entire data path from the Front-end Host to the Interlaken interface on the Host FPGA.
  • Job Duty 4 – Validate full data path between the Front-end Host and the ASIC S-Tree is functioning as designed.
  • Job Duty 5 – Optimize design for performance improvements.
  • Job Duty 6 – Write technical documentation describing FPGA architecture, its functional blocks and the data flow to and from the Host and ASIC.

Basic Skills, clearances and other elements required, in order of importance, and number of years’ experience, where applicable,  in each skill:

  • Bachelor’s or Master’s degree in Electrical Engineering.
  • Minimum of 10 years’ experience.
  • Design an FPGA based on functionality requirements and third-party IP for standardized interfaces; Implement design in Verilog or VHDL, synthesize FPGA, achieve timing closure, debug FPGA’s functionality in the system. (10 years).
  • Understanding of PCIe and how the interface works; Understanding of Interlaken and how the interface works.  (5 years).
  • Experience working with high-speed serial communication protocols.  Working with interfaces and logic blocks in different clock domains.  Design of clock trees for high-speed serial protocols. (10 years).
  • Design data structures and control mechanisms for transferring high-speed serial data between two protocols in different clock domains, i.e., queueing and/or buffer management.  (10 years).
  • Ability to work other design team which will interface with the FPGA or run Software using the FPGA logic.  Build a collaborative relationship with other team members..
  • Good communication skills, both written and verbal.
  • Demonstrated success working on a complex, tightly scheduled next-generation design where others depend on your work to progress.
  • Familiarity with Linux. 
  • Experience writing Python scripts.
  • Other: Show initiative by reading data sheets, specifications and other technical documentation.

 

Other Skills Desired, Years in each skill, where applicable:

  • Experience working with remote team members.
  • Exhibit eagerness to shorten learning curve and engage team members early.