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Internship High Performance Computing Engineer Jobs in Phoenix, AZ

Intel

Senior CPU Performance Architect

Phoenix, AZ · On-site

$165K/yr

... high-performance computing and extreme low-power products. This position offers the unique ... Collaborates with architects, design, verification, and validation engineers during the execution ...

Quantum Computing Inc.

Process Engineer - H1

Tempe, AZ · On-site

Senior Process Engineer - H1 Location : Tempe, AZ Department : Operations Reports to : Director of ... high-performance computing, artificial intelligence, cyber security as well as remote sensing ...

Intel

Server CPU SoC Architect

Phoenix, AZ · On-site

$165K/yr

... high-performance computing to low-power Edge products. You will evaluate feasibility tradeoffs ... Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related ...

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Internship High Performance Computing Engineer information

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$10

$59

$97

How much do internship high performance computing engineer jobs pay per hour?

As of Jul 30, 2026, the average hourly pay for internship high performance computing engineer in Phoenix, AZ is $59.68, according to ZipRecruiter salary data. Most workers in this role earn between $48.94 and $67.55 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an Internship High Performance Computing (HPC) Engineer, and why are they important?

To thrive as an Internship High Performance Computing Engineer, you need a solid background in computer science fundamentals, programming (especially in C/C++ or Python), and a familiarity with parallel computing concepts, often supported by coursework or relevant project experience. Experience with Linux environments, HPC clusters, and distributed computing frameworks, as well as tools like MPI, OpenMP, or Slurm, is commonly required. Strong problem-solving skills, attention to detail, and the ability to collaborate effectively within technical teams help interns stand out. These skills ensure you can efficiently support computational research, resolve technical challenges, and contribute meaningfully to HPC projects.

What is the difference between Internship High Performance Computing Engineer vs Internship Data Scientist?

AspectInternship High Performance Computing EngineerInternship Data Scientist
Required SkillsProgramming (C++, Python), parallel computing, HPC systemsStatistics, machine learning, data analysis, Python/R
Work EnvironmentResearch labs, tech companies, academia with focus on HPC systemsTech firms, finance, healthcare, research institutions
Industry UsageHigh-performance computing projects, scientific simulationsData analysis, predictive modeling, business insights

Internship High Performance Computing Engineers focus on developing and optimizing computational systems for large-scale scientific and engineering problems, requiring skills in parallel programming and HPC environments. In contrast, Internship Data Scientists analyze data to extract insights, using statistical and machine learning techniques. Both roles are valuable in tech and research sectors but differ in technical focus and daily tasks.

What is an Internship High Performance Computing Engineer?

An Internship High Performance Computing (HPC) Engineer is a student or early-career professional who works with advanced computing systems designed for processing large data sets and complex calculations at high speeds. During the internship, they assist in developing, optimizing, and maintaining HPC infrastructure, software, or applications used in scientific research, engineering, or data analysis. The role often involves learning about parallel computing, cluster management, and performance tuning, while gaining hands-on experience with cutting-edge technologies. Interns work under the supervision of experienced HPC engineers, contributing to projects that advance computational capabilities in various fields.

What types of projects can I expect to work on as an Internship High Performance Computing Engineer?

As an Internship High Performance Computing (HPC) Engineer, you will typically contribute to projects involving optimization of scientific applications, performance analysis, and cluster management. Interns often assist with benchmarking software, troubleshooting issues in parallel computing environments, and supporting researchers with technical solutions. You'll likely collaborate closely with senior HPC engineers, system administrators, and academic researchers to ensure efficient use of computing resources. This hands-on experience provides valuable insight into real-world challenges faced in HPC environments and helps build a strong foundation for future roles in the field.
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Internship High Performance Computing Engineer jobs near you

Senior CPU Performance Architect

Intel

Phoenix, AZ • On-site

$165K/yr

Full-time

Medical, Retirement, PTO

Re-posted 12 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 156 rated electronics manufacturers

Job description

Job Details:Job Description: 

The Role and Impact
As a CPU Performance Architect, you will play a pivotal role in shaping the future of Intel's cutting-edge CPU designs, driving innovation across high-performance computing and extreme low-power products. This position offers the unique opportunity to be at the forefront of technological advancements, defining and delivering architecture specifications that directly impact Intel's success and industry leadership. Your contributions will influence the performance, scalability, and efficiency of CPUs that serve diverse market segments, from enterprise solutions to edge computing devices.
Through collaboration with cross-functional teams, you will invent novel microarchitectural approaches, overcome bottlenecks, and refine designs to meet stringent constraints and evolving demands. Your work will enable Intel to consistently push boundaries and deliver CPUs that meet and exceed customer expectations.
Key Responsibilities

  • Develops and drives end-to-end CPU microarchitecture specifications for highly optimized, modular, and scalable CPU based on hardware features, requirements, and interoperability of hardware and software throughout the product life cycle.
  • Evaluates feasibility tradeoffs, explores, and defines new approaches and novel microarchitectures for CPU.
  • Models CPU performance and power characteristics and analyzes the bottlenecks of current performance features on workloads that reflect CPU future usage.
  • Collaborates with architects, design, verification, and validation engineers during the execution of the project.
  • Delivers definition of new microarchitecture and finds mitigations for issues that arise during feature implementation to improve the overall design of CPU and overcome bottlenecks and constraints.
  • Participates in the debug and fixing of performance miscorrelation between RTL and\or silicon results against the performance model.
  • Candidate must have experience in designing high performance CPUs and should be an expert in at-least one or multiple domains across the CPU (Branch Prediction, Fetch/Decode, Rename/Allocation, Reservation Stations/Execution, Memory Subsystem or Prefetchers and its interactions with Uncore).
  • Experience in debugging microarchitecture and simulation issues.
  • Strong background in microarchitecture/RTL/logic development.
  • Proven ability to resolve complex problems, applying analytical and technical skills effectively.
Qualifications:

Minimum Qualifications

  • The candidate must have a Master's Degree with at 10+ years of experience or a PhD (with dissertation within a general CPU performance domain) with 6+ years of experience working within a high performance, high frequency ARM or x86 CPU performance team.
  • Candidate must have at 8+ years of continuous work within cycle accurate C++ CPU performance simulators


Preferred Qualifications

  • Background in CPU microarchitecture and experience modeling features in a cycle accurate performance simulator.
  • Experience in microarchitecture exploration and identifying new features which provide IPC across the CPU.
  • Experience with CPU performance related activities from inception to real silicon (pathfinding, definition, correlation with RTL and Post-Si performance debug and tuning)
  • Experience with performance scenarios/use cases and KPI/workloads
  • Advanced skills with Object Oriented Programming (C++/STL) and scripting languages
  • Ability to write assembly and craft tests to evaluate and debug microarchitectural features
  • Ability to read/debug performance issues in RTL


Join Intel and become part of a team dedicated to transforming computing architecture for a smarter, faster, and more connected world.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Texas, AustinAdditional Locations:US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Oregon, HillsboroBusiness group:Silicon and Platform Engineering Group (SPE): Deliver breakthrough silicon and platform solutions that deliver industry-leading products today while also defining the next generation of computing experiences.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustThis role is a Position of Trust. Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks. For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $190,610.00-361,480.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

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Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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