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Internship Design Verification Intern Jobs (NOW HIRING)

Design Verification Engineer

Santa Clara, CA

$159K - $195K/yr

Internship or research experience in a hardware design or verification environment Preferred Qualifications * Coursework or project work in hardware verification, FPGA design, or RTL simulation ...

DV Intern

San Jose, CA ยท On-site

Familiarity with verification work and writing test benches * Familiarity with physical design ... Program details * 12-week paid internship * Generous housing support for those relocating * Daily ...

CPU Design Verification Engineer

Cambridge, MA ยท On-site

$148K - $181K/yr

... Internships or other academic project experience in hardware verification and/or design Academic ... experience in digital logic design, chip architecture, and microarchitecture Should be a great ...

CPU Design Verification Engineer

Austin, TX ยท On-site

$134K - $164K/yr

... Internships or other academic project experience in hardware verification and/or design Academic ... experience in digital logic design, chip architecture, and microarchitecture Should be a great ...

CPU Design Verification Engineer

Austin, TX

$134K - $164K/yr

... Internships or other academic project experience in hardware verification and/or design Academic experience in digital logic design, chip architecture, and microarchitecture Should be a great ...

CPU Design Verification Engineer

Austin, TX

$134K - $164K/yr

... Internships or other academic project experience in hardware verification and/or design Academic experience in digital logic design, chip architecture, and microarchitecture Should be a great ...

CPU Design Verification Engineer

Austin, TX ยท On-site

$134K - $164K/yr

... Internships or other academic project experience in hardware verification and/or design Academic ... experience in digital logic design, chip architecture, and microarchitecture Should be a great ...

Design Verification Architect

Folsom, CA ยท On-site

$190K - $269K/yr

... verification strategy and methodologies for implementing and verifying the silicon design in the ... internship experience. Minimum Qualifications: * Bachelor's degree in Electronics, Computer ...

New

Design Engineer, Verification

Austin, TX ยท On-site

$86K - $184K/yr

Job requires individual to perform various tasks associated with Design Verification RISCV ... Ability to guide and mentor interns as needed. Expected Salary Range $86,000.00 - $184,000.00 The ...

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Internship Design Verification Intern information

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How much do internship design verification intern jobs pay per hour?

As of Jul 10, 2026, the average hourly pay for internship design verification intern in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.

What is the difference between Internship Design Verification Intern vs Design Verification Engineer?

AspectInternship Design Verification InternDesign Verification Engineer
CredentialsEnrolled in or recent graduate of relevant engineering programBachelor's or Master's in Electrical/Computer Engineering
Work EnvironmentInternship, learning-focused, entry-level tasksFull-time, professional engineering environment
Industry UsageCommon in tech and semiconductor companies for trainingEstablished role in hardware/software verification teams

The Internship Design Verification Intern role is an entry-level, learning-focused position for students or recent graduates, while the Design Verification Engineer is a full-time professional responsible for verifying hardware or software designs. Interns gain foundational experience, whereas engineers lead verification projects and ensure product quality.

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What cities are hiring for Internship Design Verification Intern jobs? Cities with the most Internship Design Verification Intern job openings:
What states have the most Internship Design Verification Intern jobs? States with the most job openings for Internship Design Verification Intern jobs include:
What job categories do people searching Internship Design Verification Intern jobs look for? The top searched job categories for Internship Design Verification Intern jobs are:
Infographic showing various Internship Design Verification Intern job openings in the United States as of July 2026, with employment types broken down into 89% Full Time, 8% Part Time, and 3% Contract. Highlights an 87% Physical, 3% Hybrid, and 10% Remote job distribution, with an average salary of $40,304 per year, or $19.4 per hour.

Design Verification Engineer, Intern

Tenstorrent University Jobs

Boston, MA โ€ข On-site

Internship

Posted yesterday


Job description

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.
At Tenstorrent, we believe the future of computing must be open, which is why our interns don't just watch from the sidelines - they help build the core of it. We provide a "code-to-career" pipeline where students collaborate with industry experts to solve high-stakes problems in RISC-V and AI hardware-software co-design. By joining us, you are taking an internship to democratize high-performance computers that are accessible to everyone.
As a Design Verification Engineer Intern on the SoC Digital Verification team, you will help ensure the functional correctness and robustness of Tenstorrent's next-generation RISC-V and AI accelerator SoCs. You will work on building and improving modern verification environments, developing tests and checkers, and analyzing coverage to sign off complex digital IP and subsystems. Your work directly contributes to the reliability of the chips that power our AI and high-performance computing roadmap.
We are looking for a minimum of 3 months for this role with the potential for extension to 6 months.
This role is hybrid, based in our Boston, MA office.
Who you are
  • Pursuing a B.S. , M.S. or PhD. in Electrical Engineering, Computer Engineering, Computer Science, or a related field with a focus on digital design and verification.
  • Strong understanding of digital logic design and computer architecture (pipelines, caches, interconnects, memory systems).
  • Familiar with HDLs such as Verilog/SystemVerilog, and interested in learning Formal verification, Cocotb, and UVM-based verification methodologies.
  • Comfortable working in Linux-based development environments and using scripting languages (e.g., Python, Shell, Perl) to automate tasks.
  • Detail-oriented problem solver who enjoys debugging complex issues, reasoning about corner cases, and working from specifications.
  • Collaborative team member with clear communication skills, able to document work and discuss trade-offs with RTL, architecture, and validation teams.

What We Need
  • Help develop and maintain SystemVerilog/UVM testbenches for SoC IP blocks and subsystems, including stimulus, checkers, and scoreboards.
  • Write and refine verification test plans from architectural and micro-architectural specifications, with a strong focus on corner cases and coverage.
  • Develop constrained-random and directed tests, run regressions, and triage failures by working closely with RTL designers to root-cause issues.
  • Analyze functional and code coverage results, identify gaps, and propose additional tests or checks to drive coverage closure.
  • Contribute to automation and infrastructure (scripts, Makefiles, CI hooks, dashboards) that improve verification productivity and debug turnaround time.
  • Partner with cross-functional teams (architecture, design, performance, validation) to align on expected behavior and sign-off criteria for silicon.
  • Have impact measured through coverage metrics achieved, quality and reproducibility of bugs found, and robustness of the verification environment you help build.

What You Will Learn
  • End-to-end SoC design and verification flow for cutting-edge RISC-V and AI accelerator architectures.
  • Industry-standard verification methodologies (SystemVerilog/UVM), including testbench architecture, stimulus generation, and scoreboard/checker design.
  • Hands-on experience with simulation, regression, and coverage tools used in large-scale industrial verification environments.
  • How to read and interpret hardware specifications, micro-architecture documents, and timing diagrams, and translate them into actionable tests and assertions.
  • Exposure to high-performance interconnects, memory controllers, and accelerators, and how they are verified at IP, subsystem, and SoC levels.
  • Best practices for collaborating in a silicon development team, including code review, documentation, and cross-site communication.

USA Hiring Timelines
This internship opportunity is available throughout our 3 terms with the following corresponding recruitment cycles:
  • Winter Term: Jan-Apr work term, Sept-Dec recruit.
  • Summer Term: May-Aug work term, Oct-Apr recruit.
  • Fall Term: Sept-Dec work term, Jan-Aug recruit.

Please note these timelines are for reference only. Actual timelines may vary.
This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.