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Internship Cvd Process Engineer Jobs (NOW HIRING)

Micron Technology

PCVD Process Manager

Boise, ID · On-site

Responsibilities: • Build and lead the ID1 PVD/CVD process engineering teams, including hiring, onboarding, and development • Define team strategy, performance targets, and succession plans ...

Micron

PCVD Process Manager

Boise, ID · On-site

Build and lead the ID1 PVD/CVD process engineering teams, including hiring, onboarding, and development Define team strategy, performance targets, and succession plans aligned to factory goals ...

POWEREX INC

Process Engineer

Youngwood, PA · On-site

$60K - $95K/yr

May supervise interns or co-op students. QUALIFICATIONS: * BS in relevant engineering field required. * Demonstrated skills and abilities in all responsibilities required of junior process engineers.

Ionbond

Process Engineer

Beachwood, OH · On-site

Ionbond is seeking a dynamic Process Engineer to join our team. In this role, you'll work closely ... CVD coatings and coatings systems is required familiarity with ISO 9001:2015 and ISO 13485:2016 ...

POWEREX, INC.

Process Engineer

Youngwood, PA · On-site

May supervise interns or co-op students. QUALIFICATIONS: * BS in relevant engineering field required. * Demonstrated skills and abilities in all responsibilities required of junior process engineers.

INSPYR Solutions

Senior Process Engineer

Tomball, TX · On-site

$98K - $127K/yr

Senior Process Engineer Location: Tomball, TX, 77375 (100% onsite) Duration: Direct-Hire Work ... Experience with specialty materials, nanomaterials, carbon materials, CVD, or fine powders is a ...

ASM

Principal Process Engineer

Phoenix, AZ · On-site

As a Principal Process Engineer at ASM, you will work with semiconductor processing and analytical ... Cure, oxidation, ALD, CVD, Epitaxy, PECVD and/or other thin film deposition. * Materials ...

Eichleay, Inc.

Process Engineer

Ferndale, WA · On-site

$75K/yr

This Process Engineering role is ideal for engineers looking to gain hands-on experience in ... Less than one year or up to 4 years of experience, including REQUIRED internship, co-op, or ...

Eichleay, Inc

Process Engineer

Ferndale, WA

$75K/yr

This Process Engineering role is ideal for engineers looking to gain hands-on experience in ... Less than one year or up to 4 years of experience, including REQUIRED internship, co-op, or ...

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How much do internship cvd process engineer jobs pay per hour?

As of Jun 5, 2026, the average hourly pay for internship cvd process engineer in the United States is $22.18, according to ZipRecruiter salary data. Most workers in this role earn between $18.27 and $25.96 per hour, depending on experience, location, and employer.
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Internship Cvd Process Engineer jobs near you
Infographic showing various Internship Cvd Process Engineer job openings in the United States as of May 2026, with employment types broken down into 13% Locum Tenens, 20% As Needed, 40% Full Time, and 27% Part Time. Highlights an 93% Physical, 2% Hybrid, and 5% Remote job distribution, with an average salary of $46,141 per year, or $22.2 per hour.

Senior Process Engineer

Mesh Optical Technologies

Gardena, CA • On-site

$140K - $180K/yr

Other

Medical, Dental, Vision, Retirement, PTO

Posted 14 days ago

Job description

SENIOR PROCESS ENGINEER

Mesh Optical Technologies was founded on the belief that optical photons will be at the center of advanced technologies in the coming century. Making advanced technology ubiquitous means building at scale, and that's exactly what we're doing at Mesh.

Our products require semiconductor-grade packaging processes-bumping, dicing, precision bonding, optical alignment, and automated assembly-executed at yield levels and volumes that demand real process engineering discipline. We are seeking a Senior Process Engineer to own the development and qualification of these processes from R&D through production ramp, and to help build high-volume semiconductor packaging process engineering in the US.

RESPONSIBILITIES

  • Own development of wafer prep and die-level packaging processes: bumping, dicing, sub-micron precision bonding, sub-micron optical alignment, flip-chip die bonding, wire-bonding, dispense, fully-automated final assembly and associated materials
  • Own tool selection, materials selection, recipe development, and statistical process control limits to transfer processes from R&D to volume production
  • Translate package and product designs into high volume production processes and collaborate with electrical, mechanical, and photonic circuit design teams to design-for-manufacturing
  • Design production processes from the lab bench through proof of concept and production ramp
  • Establish process limits and feedback process constraints as design rules to design teams
  • Characterize parts with x-ray, FIB cut/SEM, CSAM, and die shear testing, closing the loop with electrical, mechanical, and photonic circuit design teams
  • Act as the technical owner for failure-analysis findings, root cause analysis, and corrective actions
  • Push process yields above 99.9% and thermal-cycle reliability for years-long qualification
  • Provide technical mentorship as we work to build up high-volume semiconductor packaging process engineering in the US

QUALIFICATIONS

  • MS or PhD in Materials Science, Chemical Engineering, Electrical Engineering, or similar
  • Extensive (MS + 2 years) hands-on semiconductor process-development experience
  • Strong troubleshooting skills and hands-on experience in semiconductor packaging, assembly, or advanced manufacturing environments
  • Demonstrated success qualifying processes such as flip-chip bonding, wafer processing, plasma cleaning, and wire bonding
  • Expertise in statistical quality control and process improvement methodologies, with experience leading internal audits and driving continuous improvement
  • Comfortable working in a cleanroom or controlled manufacturing environment with cross-functional engineering teams
  • Willingness to work extended hours and weekends as needed

PREFERRED EXPERIENCE

  • 5+ years of fab or wafer level packaging experience (e.g. lithography, etch, CVD, CMP, solder bumping, wafer dicing)
  • Experience integrating photonic devices into complex opto-electronic packages, sub-m die-bonding, wafer prep, and materials used in advanced packaging

COMPENSATION AND BENEFITS:

Pay range: 
Senior Process Engineer: $140,000.00 - $180,000.00/per year

Title and base salary are determined on a case by case basis commensurate with experience and merit.

In addition to base salary, compensation for this role includes:

  • Eligibility for long-term incentives including company stock options and discretionary bonuses awarded for exceptional achievements.
  • Comprehensive medical, vision, and dental insurance with significant cost covered by the company for yourself and dependents.
  • Paid parental leave and flexible PTO (3 weeks accrued vacation and 10 company holidays per year).
  • 401(k) retirement plan access.
  • Relocation assistance to sunny Los Angeles.

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