1

Intern Hardware Verification Engineer Jobs in Oregon

OR

$170K - $250K/yr

The Role We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the ... Solid understanding of SystemVerilog, digital logic, RTL design, and hardware verification flows.

Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology and we'd love to have you join us ...

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology and we'd love to have you join us ...

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology organization, and we'd love to have you ...

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology and we'd love to have you join us.

Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology and we'd love to have you join us.

Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology organization, and we'd love to have you ...

Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology organization, and we'd love to have you ...

Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology organization, and we'd love to have you ...

Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology and we'd love to have you join us ...

The people who work here have reinvented entire industries with all Apple Hardware products. The ... Description As a CPU Design Verification Engineer owning the verification of a certain area of ...

The people who work here have reinvented entire industries with all Apple Hardware products. The ... Description As a CPU Design Verification Engineer owning the verification of a certain area of ...

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

The people who work here have reinvented entire industries with all Apple Hardware products. The ... Description As a CPU Design Verification Engineer owning the verification of a certain area of ...

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

The people who work here have reinvented entire industries with all Apple Hardware products. The ... Description As a CPU Design Verification Engineer owning the verification of a certain area of ...

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

The people who work here have reinvented entire industries with all Apple Hardware products. The ... Description As a CPU Design Verification Engineer owning the verification of a certain area of ...

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

The people who work here have reinvented entire industries with all Apple Hardware products. The ... Description As a CPU Design Verification Engineer owning the verification of a certain area of ...

The people who work here have reinvented entire industries with all Apple Hardware products. The ... Description As a CPU Design Verification Engineer owning the verification of a certain area of ...

The people who work here have reinvented entire industries with all Apple Hardware products. The ... Description As a CPU Design Verification Engineer owning the verification of a certain area of ...

Design Verification Engineer

Beaverton, OR

$141K - $172K/yr

Design Verification Engineers at Apple are responsible for verifying the functionality and ... This is a critical job within Apple's Hardware Technology and we'd love to have you join us ...

next page

Showing results 1-20

Intern Hardware Verification Engineer information

What types of projects and responsibilities can I expect as an Intern Hardware Verification Engineer?

As an Intern Hardware Verification Engineer, you will typically assist in developing and executing test plans, writing and running simulation scripts, and debugging hardware designs alongside experienced engineers. You may work with design and verification teams to identify and resolve issues in digital circuits or systems, often using industry-standard verification languages and tools. Interns also gain hands-on experience with methodologies such as UVM or SystemVerilog, and may participate in regular team meetings and code reviews. This role is a great opportunity to build practical skills, collaborate with cross-functional teams, and learn about the end-to-end hardware development process.

What does an Intern Hardware Verification Engineer do?

An Intern Hardware Verification Engineer assists in testing and validating hardware components and systems to ensure they function correctly and meet design specifications. Their responsibilities often include writing test cases, running simulations, analyzing results, and working with senior engineers to identify and resolve issues. This role provides hands-on experience with hardware design tools, verification methodologies, and debugging processes. Interns gain valuable skills in both hardware engineering and quality assurance, which are essential for a career in hardware development.

What is the difference between Intern Hardware Verification Engineer vs Intern Digital Design Engineer?

AspectIntern Hardware Verification EngineerIntern Digital Design Engineer
Required SkillsHardware verification, scripting, basic digital logicDigital design, HDL coding, logic simulation
Work EnvironmentTesting and verifying hardware componentsDesigning and developing digital circuits
Industry UsageSemiconductor, electronics manufacturingSemiconductor, consumer electronics, embedded systems

Both roles are internship positions in hardware and digital design fields, often found in semiconductor and electronics companies. The Hardware Verification Engineer focuses on testing and validating hardware components, while the Digital Design Engineer emphasizes creating digital circuits. Interns in both roles typically require knowledge of digital logic and basic scripting, making them similar but distinct in their core responsibilities.

What are the key skills and qualifications needed to thrive as an Intern Hardware Verification Engineer, and why are they important?

To thrive as an Intern Hardware Verification Engineer, you need a solid understanding of digital logic design, computer architecture, and at least a bachelor’s coursework in electrical or computer engineering. Familiarity with hardware description languages (such as Verilog or VHDL), simulation tools (like ModelSim or Questa), and version control systems is typically required. Attention to detail, strong problem-solving abilities, and effective teamwork are standout soft skills in this role. These skills ensure accurate verification of hardware designs, timely identification of issues, and successful collaboration within engineering teams.
What are the most commonly searched types of Hardware Verification Engineer jobs in Oregon? The most popular types of Hardware Verification Engineer jobs in Oregon are:

Senior ASIC Design Verification Engineer

K2 Space

OR

$170K - $250K/yr

Other

Medical, Dental, Vision, Life, PTO

Re-posted 24 days ago


Job description

The Role 

We are seeking a Senior ASIC Design Verification Engineer whose role will be to verify the functionality, performance, and robustness of our custom silicon designs. You will help define the verification approach, contribute to methodology, and work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers. This is a hands-on role with high ownership, deep technical engagement, and the opportunity to shape first-generation silicon. 

Responsibilities 

  • Develop and execute verification plans for block-level, subsystem-level, and full-chip environments. Build SystemVerilog/UVM test benches, including agents, monitors, scoreboards, checkers, and coverage models.
  • Write SystemVerilog Assertions (SVA) and integrate formal verification where appropriate.
  • Drive constrained-random and directed testing strategies to validate functionality, corner cases, and stress scenarios.
  • Run simulations, triage failures, drive root-cause analysis, and collaborate with RTL designers to resolve issues.
  • Implement and maintain functional coverage, code coverage, assertion coverage, and ensure coverage closure for sign-off.
  • Manage regression testing, simulation farms, and CI pipelines to ensure high test throughput and fast debug iterations.
  • Participate in design reviews, microarchitecture discussions, and influence design-for-verification (DFV) best practices.
  • Work closely with architecture, RTL design, DFT, firmware, physical design, and silicon validation engineers to ensure end-to-end coverage and test.
  • Support silicon bring-up and post-silicon validation through test reuse, diagnostics, and debug analysis.
  • Participate in ASIC team interviews.
  • Contribute to advancement of DV methodologies and improvements.
  • Engage external IP providers and verification partners when needed. 

Qualifications 

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
  • 5+ years of experience in ASIC/SoC verification.
  • Solid understanding of SystemVerilog, digital logic, RTL design, and hardware verification flows.
  • Proficiency with a simulation (VCS, Xcelium, Questa), waveform debug (Verdi, SimVision), coverage tool, and scripting languages (ex: Python, Perl, TCL).
  • Experience with testplanning, UVM-based testbench development, constrained-random testing, functional coverage, and SystemVerilog assertions.
  • Experience with regression management, coverage analysis, revision control (Git), and CI/CD automation.
  • Understanding of several industry-standard interfaces (ex: APB/AHB/AXI).
  • Familiarity with embedded processor-based designs and firmware/bare metal coding (ex: C, C++). 

Nice to Have

  • Experience with developing and integrating reference models.
  • Understanding of low power verification.
  • Familiarity with gate-level simulation and analog behavioral models.
  • Involvement in post-silicon validation planning and execution.
  • Experience working in cross-functional, geographically distributed teams.
  • Experience in space, telecom, or RF/digital mixed systems is a plus. 

Compensation and Benefits:

  • Base salary range for this role is $170,000 - $250,000 + equity in the company
  • Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
  • Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks

K2 Space logo

About K2 Space

Sourced by ZipRecruiter

Industry

Guided missile and space vehicle manufacturing

Company size

11 - 50 Employees

Headquarters location

Los Angeles, CA, US

Year founded

2022