... ASIC design experience. * Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 8 years (or ...
... ASIC design experience. * Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 8 years (or ...
... ASIC design experience. * Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 8 years (or ...
... ASIC design experience. * Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 8 years (or ...
FPGA/ASIC Engineer
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDL Department ... In this role, you will oversee definition, design, verification, and documentation for FPGA/ASIC ...
FPGA/ASIC Engineer
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDL Department ... In this role, you will oversee definition, design, verification, and documentation for FPGA/ASIC ...
FPGA/ASIC ENGINEER
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDLDepartment ... In this role, you will oversee definition, design, verification, and documentation forFPGA/ASIC ...
FPGA/ASIC ENGINEER
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDLDepartment ... In this role, you will oversee definition, design, verification, and documentation forFPGA/ASIC ...
FPGA/ASIC Engineer
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDL Department ... In this role, you will oversee definition, design, verification, and documentation for FPGA/ASIC ...
FPGA/ASIC Engineer
Vernon Hills, IL · On-site
$150 - $180/hr
... Engineer to join our VHDL Department ... In this role, you will oversee definition, design, verification, and documentation for FPGA/ASIC ...
Hardware Engineer
Chicago, IL · On-site
$127K - $168K/yr
What You'll Do ASIC Design & Development * Participate in the full ASIC development lifecycle, from specification through integration and deployment * Design and implement RTL for next-generation ...
Hardware Engineer
Chicago, IL · On-site
$127K - $168K/yr
What You'll Do ASIC Design & Development * Participate in the full ASIC development lifecycle, from specification through integration and deployment * Design and implement RTL for next-generation ...
Hardware Engineer
Chicago, IL · On-site
$127K - $167K/yr
What You'll Do ASIC Design & Development * Participate in the full ASIC development lifecycle, from specification through integration and deployment * Design and implement RTL for next-generation ...
Hardware Engineer
Chicago, IL · On-site
$127K - $167K/yr
What You'll Do ASIC Design & Development * Participate in the full ASIC development lifecycle, from specification through integration and deployment * Design and implement RTL for next-generation ...
Hardware Engineer
Chicago, IL · On-site
$127K - $167K/yr
IMC is seeking a Hardware Engineer to join our Global Hardware team and help develop the next ... You'll contribute across the ASIC development lifecycle, from RTL design and validation to ...
Hardware Engineer
Chicago, IL · On-site
$127K - $167K/yr
IMC is seeking a Hardware Engineer to join our Global Hardware team and help develop the next ... You'll contribute across the ASIC development lifecycle, from RTL design and validation to ...
Graphic Design Intern
River Forest, IL · On-site
$15/hr
Graphic Design Intern DEPARTMENT: Office of Alumnae/i Relations PAY RATE: $15/hour for up to 15 ... Provide design and logistical support for major events and ongoing programming * Attend team ...
Graphic Design Intern
River Forest, IL · On-site
$15/hr
Graphic Design Intern DEPARTMENT: Office of Alumnae/i Relations PAY RATE: $15/hour for up to 15 ... Provide design and logistical support for major events and ongoing programming * Attend team ...
GTG Intern - User Experience Design
Chicago, IL · Hybrid
$33/hr
As a User Experience Design Intern, you will work closely with a Lead UX Designer on executing ... Participate in discussions with users, stakeholders, product managers, researchers, and engineers ...
GTG Intern - User Experience Design
Chicago, IL · Hybrid
$33/hr
As a User Experience Design Intern, you will work closely with a Lead UX Designer on executing ... Participate in discussions with users, stakeholders, product managers, researchers, and engineers ...
GTG Intern - User Experience Design
Chicago, IL · Hybrid
$33/hr
As a User Experience Design Intern, you will work closely with a Lead UX Designer on executing ... Participate in discussions with users, stakeholders, product managers, researchers, and engineers ...
GTG Intern - User Experience Design
Chicago, IL · Hybrid
$33/hr
As a User Experience Design Intern, you will work closely with a Lead UX Designer on executing ... Participate in discussions with users, stakeholders, product managers, researchers, and engineers ...
GTG Intern - User Experience Design
Chicago, IL · On-site
$33/hr
As a User Experience Design Intern, you will work closely with a Lead UX Designer on executing ... Participate in discussions with users, stakeholders, product managers, researchers, and engineers ...
GTG Intern - User Experience Design
Chicago, IL · On-site
$33/hr
As a User Experience Design Intern, you will work closely with a Lead UX Designer on executing ... Participate in discussions with users, stakeholders, product managers, researchers, and engineers ...
PD - IP Lead - Sr Staff, Physical Design
$138K - $142K/yr
As an Eliyan Sr Staff / Principal Physical Design Engineer, you will be working at a fast-paced ... Expertise in physical design, timing closure, and signoff for small to large ASIC IP blocks ...
Quick apply
PD - IP Lead - Sr Staff, Physical Design
$138K - $142K/yr
As an Eliyan Sr Staff / Principal Physical Design Engineer, you will be working at a fast-paced ... Expertise in physical design, timing closure, and signoff for small to large ASIC IP blocks ...
Construction Engineer Intern
Lombard, IL · On-site
$20 - $30/hr
The intern will assist in a variety of tasks related to the planning, execution, and documentation ... design plans, specifications, and safety standards. * Support engineers in preparing project ...
Quick apply
Construction Engineer Intern
Lombard, IL · On-site
$20 - $30/hr
The intern will assist in a variety of tasks related to the planning, execution, and documentation ... design plans, specifications, and safety standards. * Support engineers in preparing project ...
Construction Engineer Intern
$20 - $30/hr
The intern will assist in a variety of tasks related to the planning, execution, and documentation ... design plans, specifications, and safety standards. * Support engineers in preparing project ...
Construction Engineer Intern
$20 - $30/hr
The intern will assist in a variety of tasks related to the planning, execution, and documentation ... design plans, specifications, and safety standards. * Support engineers in preparing project ...
Construction Engineer Intern
Lombard, IL · On-site
$20 - $30/hr
The intern will assist in a variety of tasks related to the planning, execution, and documentation ... design plans, specifications, and safety standards. * Support engineers in preparing project ...
Construction Engineer Intern
Lombard, IL · On-site
$20 - $30/hr
The intern will assist in a variety of tasks related to the planning, execution, and documentation ... design plans, specifications, and safety standards. * Support engineers in preparing project ...
Backend / Frontend Developer Intern
Chicago, IL · On-site
$19.75 - $26/hr
1. Frontend Developer Intern: We are seeking a motivated and detail-oriented Frontend Developer ... Participate in the design and refinement of user interfaces with an emphasis on performance ...
Backend / Frontend Developer Intern
Chicago, IL · On-site
$19.75 - $26/hr
1. Frontend Developer Intern: We are seeking a motivated and detail-oriented Frontend Developer ... Participate in the design and refinement of user interfaces with an emphasis on performance ...
Backend / Frontend Developer Intern
Chicago, IL · On-site
$19.75 - $26/hr
1. Frontend Developer Intern: We are seeking a motivated and detail-oriented Frontend Developer ... Participate in the design and refinement of user interfaces with an emphasis on performance ...
Quick apply
Backend / Frontend Developer Intern
Chicago, IL · On-site
$19.75 - $26/hr
1. Frontend Developer Intern: We are seeking a motivated and detail-oriented Frontend Developer ... Participate in the design and refinement of user interfaces with an emphasis on performance ...
The Process Mapping & Future-State Design Intern will build the workflow specification library for ... Engineering, Supply Chain, or a related field * Prior internship, coursework, or project experience ...
The Process Mapping & Future-State Design Intern will build the workflow specification library for ... Engineering, Supply Chain, or a related field * Prior internship, coursework, or project experience ...
R&D Engineering Intern
Chicago, IL · On-site
$17.25 - $22.50/hr
400 N Aberdeen St, STE 575 R&D Engineering Chicago, IL 60642 Intern Contact: info@rhaeos.com ... Specific responsibilities include but are not limited to the following: ● Assist in the design ...
R&D Engineering Intern
Chicago, IL · On-site
$17.25 - $22.50/hr
400 N Aberdeen St, STE 575 R&D Engineering Chicago, IL 60642 Intern Contact: info@rhaeos.com ... Specific responsibilities include but are not limited to the following: ● Assist in the design ...
Intern Asic Design Engineer information
See Niles, IL salary details
$9.09 - $11.59
9% of jobs
$11.59 - $14.09
8% of jobs
$14.74 is the 25th percentile. Wages below this are outliers.
$14.09 - $16.60
28% of jobs
The median wage is $17.26 / hr.
$16.60 - $19.10
16% of jobs
$20.81 is the 75th percentile. Wages above this are outliers.
$19.10 - $21.60
20% of jobs
$21.60 - $24.10
9% of jobs
$24.10 - $26.60
4% of jobs
$26.60 - $29.10
1% of jobs
$29.10 - $31.60
1% of jobs
$31.60 - $34.11
1% of jobs
$34.11 - $36.61
2% of jobs
$9
$19
$36
How much do intern asic design engineer jobs pay per hour?
What does an Intern ASIC Design Engineer do?
What types of projects and responsibilities can I expect as an Intern ASIC Design Engineer?
What are the key skills and qualifications needed to thrive as an Intern ASIC Design Engineer, and why are they important?
What is the difference between Intern Asic Design Engineer vs Intern Digital Design Engineer?
| Aspect | Intern Asic Design Engineer | Intern Digital Design Engineer |
|---|---|---|
| Credentials | Typically pursuing or holding a degree in Electrical Engineering or Computer Engineering | Typically pursuing or holding a degree in Electrical Engineering or Computer Engineering |
| Work Environment | Design teams focused on ASIC development, hardware design labs, collaborative projects | Digital circuit design, simulation, verification, and hardware testing environments |
| Industry Usage | Used in semiconductor companies, integrated circuit design firms, and hardware startups | Common in semiconductor, electronics, and hardware development companies |
Both roles involve working on digital hardware design, often requiring similar educational backgrounds. The main difference lies in the focus: Intern Asic Design Engineers work on the overall ASIC development process, while Intern Digital Design Engineers focus specifically on digital circuit design and verification. Both positions are essential in hardware development and often overlap in skills and work environment.
What cities near Niles, IL are hiring for Intern Asic Design Engineer jobs?
Cities near Niles, IL with the most Intern Asic Design Engineer job openings:

Principal/ Sr. Principal FPGA Design Engineer
Rolling Meadows, IL • On-site
Full-time
Medical, Life, PTO
Re-posted 5 days ago
Northrop Grumman rating
8.2
Based on 365 frontline employees who took The Breakroom Quiz
85th of 544 rated manufacturers
Job description
Embark on a career putting innovative, reliable, and agile products and ideas into orbit, and beyond. Northrop Grumman Space Systems has opportunities waiting for you that play a vital role in human space exploration, national defense, and scientific discovery, supporting multiple programs across the universe. With us, you'll discover a culture of curiosity and collaboration that will have you Defining Possible from the day you start. Our space systems connect and protect millions of people on earth every day, now and for the future.Explore your future and launch your career with Northrop Grumman Space Systems today!
Our team is chartered with providing the skills, innovative technologies to develop, design, produce and sustain optimized product lines across the sector while providing a decisive advantage to the warfighter. Come be a part of our mission!
We are seeking a talented FPGA Design engineer with signal processing experience to join our growing team in Rolling Meadows, IL.
As an FPGA Design Engineer, you will join our diverse team and be responsible for research, requirements analysis and systems architecture, design, coding, test bench design, verification, synthesis and place & route for our digital signal processing products. You will be working with digital subsystem and circuit card designs that utilize the latest FPGA technologies from all major vendors and device families including Xilinx, Intel (Altera), and Microsemi (Actel) and support high speed interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces. Your expertise in digital signal processing, modeling and simulation, and circuit level design and test are desired for this position.
This position will be filled as a level 3 or level 4.
Basic Qualifications
- Principal FPGA Design Engineer (Level 3):Bachelors' degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 5 years (or MS and 3+ years, or a PhD) of FPGA/ASIC design experience.
- Sr. Principal FPGA Design Engineer (Level 4): Bachelors' degree in Electrical Engineering, Computer Engineering or similar engineering discipline with a minimum 8 years (or MS and 6+ years, or PhD +3 years) of FPGA/ASIC design experience.
- In-depth knowledge of VHDL and/or Verilog
- -Proficiency in High level synthesis (Xilinx Vivado HLS AND/OR Mentor Catapult HLS) with C++
- Expertise achieving timing closure on dense FPGA designs
- Working knowledge of DSP structures and techniques
- Proficient in Python, C or other scripting languages
- Extensive experience generating test benches
- Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place and route, static timing analysis, and power analysis
- Experience with FPGA simulation tools to verify performance of complex RTL blocks
- Experience with Xilinx or Intel/Altera FPGA architectures and design tools
- Soft skills to include: Adaptive, creative, collaborative, comfortable working independently, enjoys solving difficult problems while communicating with all levels of an organization internally and externally
- Must be a US Citizen with ability to obtain and maintain Top Secret security clearance with SCI
Preferred Qualifications:
- Current or Active Top Secret with SCI/SAP security clearance
- Extensive experience implementing Digital Signal or Image Processing algorithms on FPGAs
- Extensive experience with high-speed interfaces: Ex. AXI, PCIe, Xilinx Aurora, JESD, 10G Ethernet, etc.
- Working knowledge of SDR platforms and architectures
- Extensive experience developing FPGA algorithms for SoC based architectures
- Experience developing FPGA/SW interfaces and controls
- Experience developing and prototyping in MATLAB/Simulink
- Experience debugging down to the hardware level & experience using Signal Generators, Logic Analyzers, Digital Oscilloscopes and Embedded FPGA
- Debugging tools.
- Experience and knowledge developing requirements for FPGA-based products
- Experience with Electronic Design Automation (EDA) Tools: Mentor Graphics ModelSim/QuestaSim, Synplify, Xilinx ISE/ Vivado, Intel Quartus, Altera SOPC Builder, Altera Qsys, DSP Builder.
- Experience working with or developing test benches using SystemVerilog and Universal Verification Methodology (UVM)
- -Familiarity with revision control, documentation, planning, and review systems similar to GIT/SVN/ClearCase, DOORS, Jira/Rally/ClearQuest
What Northrop Grumman employees say
Pay
Benefits
Hours and flexibility
Workplace
Get the full story on Breakroom
About Northrop Grumman
Sourced by ZipRecruiter
At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work - and we have an insatiable drive to do what others think is impossible.
Industry
Space research administration
Company size
10,000+ Employees
Headquarters location
Falls Church, VA, US
Year founded
1939