Intel Cpu Manager Jobs (NOW HIRING)

Job Details:Job Description: 

The Role and Impact

As a Senior CPU Physical Design Engineer, you will play a critical role in delivering Intel's next-generation high-performance CPUs from concept through manufacturing. You will drive physical implementation and optimization of complex CPU designs, ensuring industry-leading performance, power efficiency, area optimization, and manufacturability.

In this role, you will collaborate with architecture, logic design, circuit design, CAD, and validation teams to enable innovative computing solutions that power client, data center, and AI-driven products. Your contributions will directly influence Intel's future technology roadmap and help shape the next generation of computing.

About the Team

Join Intel's CPU Design team within the Silicon and Platform Engineering Group (SPE), where engineers develop industry-leading processor technologies that power billions of devices worldwide. Our team leverages advanced process technologies, innovative design methodologies, and cross-functional collaboration to deliver world-class CPU products and advance Intel's mission of creating world-changing technology.

What You'll Do

Key responsibilities will include but not limited to:

• Perform physical design implementation for custom CPU designs, transforming RTL into a design database ready for manufacturing.
• Execute all aspects of the physical design flow, including floor planning, synthesis, place and route, clock tree synthesis, static timing analysis, power/clock distribution, and noise analysis.
• Conduct verification and signoff processes, including formal equivalence verification, reliability verification, layout verification, and structural design checking.
• Collaborate closely with cross-functional teams, including logic, circuit, architecture, and design automation, to optimize CPU microarchitectures for power, area, and frequency improvements.
• Build and refine physical design methodologies, enhancing flow automation and efficiency.
• Work with industry EDA vendors to improve design tools and enable high-speed, low-power synthesizable CPUs.
• Analyze design results and propose recommendations for optimizing current and future CPU microarchitectures.

Behavioral traits that we are looking for:

• Strong technical problem-solving and analytical skills.
• Ownership and accountability for delivering quality results.
• Effective collaboration across diverse, global engineering teams.
• Strong written and verbal communication skills.
• Adaptability in a dynamic and fast-paced development environment.
• A passion for continuous learning and technical innovation.

Intel invests in our people and offers a complete and competitive package of benefits employees and their families through every stage of life.

See Intel Benefitsfor more details.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Note:

This position is not eligible for Intel immigration sponsorship.

For information on Intel's immigration sponsorship guidelines, please see

Intel U.S. Immigration Sponsorship Information

Minimum Qualifications and Experience:

Bachelor's degree in Electrical/ Computer Engineering, or a related field with 6+ years of relevant experience. Or a Master's degree in the same field with 4+ years of relevant experience, OR a PhD in in the same field with 2+ years of relevant experience.
Your experience described above must be in the following:

• Physical design EDA tools such as Synopsys Fusion Compiler, Cadence Genus/Innovus, or equivalent
• Experience with scripting languages (e.g., TCL, Perl, Python) for tool automation and design exploration
• Experience in backend design workflows, including constraints management, clock tree synthesis, static timing analysis, and layout verification
• Completion of at least one tape-out on advanced process nodes
• Experience with RTL-to-GDS automation methodologies
• AI/ML based automatic place-and-route methods for design efficiency and quality

Preferred Qualifications and Experience:

• Low-power design techniques, multiple power domains (MPP/UPF), and power analysis methodologies

• Digital design fundamentals, CMOS process technology, and CPU microarchitecture
• Experience collaborating with EDA vendors to refine tool capabilities
• Multi-vendor experience with thermal & power reduction techniques
• Power/performance optimization tradeoffs in APR

Why Join Intel

At Intel, you will work alongside some of the industry's leading engineers to develop technologies that power the future of computing. This role offers the opportunity to influence next-generation CPU products, solve challenging technical problems, and contribute to innovations that enable AI, cloud computing, and advanced client platforms. If you are passionate about semiconductor technology and eager to drive meaningful impact, we encourage you to apply.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Texas, AustinAdditional Locations:Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $164,470.00-269,100.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.

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ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.