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Home Based Potato Chip Jobs (NOW HIRING)

... safe potato chips that meet all company specifications and standards. This role operates fry ... rates based on recommended fried chip pounds per hour, measured through the plant hourly KPI ...

... Chip, Specialty potatoes, and rotational crops as well as third-party grazing operations. The ... Provide oversight and leadership to all potato production activities. 1. Work closely with the ...

... Chip, Specialty potatoes, and rotational crops as well as third-party grazing operations. The ... Provide oversight and leadership to all potato production activities. 1. Work closely with the ...

Photonics Chip Lead

Santa Clara, CA · On-site

$120K - $158K/yr

The expected base pay range for this role may be modified based on market conditions. Additional ... work and home life, robust mental health resources to prioritize emotional well-being, and a ...

Photonics Chip Lead

Irvine, CA

$110K - $144K/yr

The expected base pay range for this role may be modified based on market conditions. Additional ... work and home life, robust mental health resources to prioritize emotional well-being, and a ...

Photonics Chip Lead

San Diego, CA

$108K - $143K/yr

The expected base pay range for this role may be modified based on market conditions. Additional ... work and home life, robust mental health resources to prioritize emotional well-being, and a ...

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Infographic showing various Home Based Potato Chip job openings in the United States as of July 2026, with employment types broken down into 1% As Needed, 78% Full Time, 14% Part Time, and 7% Contract. Highlights an 92% Physical, 2% Hybrid, and 6% Remote job distribution.

Staff Chip Design Engineer (Redwood City)

Cognichip

Redwood City, CA • On-site

Full-time

This job post has expired 1 day ago. Applications are no longer accepted.


Job description

Overview

At Cognichip, we’re not just building AI—we’re redefining what’s possible at the nexus of silicon design and machine learning. As a Staff Chip Design Engineer on our team, you’ll tackle real-world scientific and coding challenges—defining the processes for dataset collection, curation, and enhancement. You’ll fuse knowledge of chip design and ML into end-to-end silicon design flows. If you thrive on pushing the envelope of research and translating cutting-edge ideas into production-grade systems, this is your stage.

What you\'ll do
  • Serve as the domain experts, embedding chip design experience into a team creating AI chip design assistants
  • Bridge research and production. Collaborate closely with ML and SW teams to integrate experimental models into scalable pipelines.
  • Define data-processing pipelines, training orchestration, and evaluation frameworks to accelerate iteration on large-scale experiments.
  • Analyze and iterate. Dive deep into large datasets—experimental logs, simulation outputs, and user interaction traces—to diagnose model behavior, surface failure modes, and drive evidence-based improvements.
  • Publish and present. Document findings in technical reports, contribute to open-source projects, and present work internally (and externally, when appropriate) to help shape the broader AI research community.
What You Bring
  • Masters in Computer Science, Electrical Engineering, or a closely related field
  • 10-15 years of experience in RTL design, or a combination of design and verification
  • Proficiency in SystemVerilog and Python languages
  • Excellent written and verbal communication skills, esp to convey chip design knowledge to scientists/engineers in other fields
  • Comfortable working in a dynamic, research-heavy startup environment
  • Demonstrated coursework or project experience in machine learning and/or deep learning
Bonus Points
  • Personal projects showcasing innovation, creativity, and continuous learning
  • Knowledge of industry-standard communication protocols (SPI, I2C, AXI, Ethernet, PCIe, DDR5, etc)
  • Knowledge of open-source tools and contribution practices (Verilator, CocoTB, Yosys, OpenSTA, etc)
  • Experience with multiple areas of chip flow (RTL design, validation, synthesis, physical design, etc)
  • Experience with FPGA development (Vivado, Vitis, Quartus, etc), front end, IP integration, and/or back end
What it's like here

We’re a fast-moving AI startup with a collaborative, high-trust culture. You’ll work with top-tier engineers, scientists, and builders—solving hard problems that sit at the intersection of cloud computing, AI, and chip design. We value technical excellence, ownership, and the freedom to experiment. If you’re excited to build the future of engineering, you’ll feel right at home.

Logistics

This position is available in Silicon Valley’s Redwood Shores, CA. We have a hybrid schedule with four days in office, one day remote. Cognichip accepts applications that need H1B transfer.

How to apply

Don’t meet every single requirement? Feel over-qualified? That’s okay—if you\'re excited about our mission, we’d still love to hear from you. We are growing fast and need a world class team of various experience levels.

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