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Home Based Memory Design Engineer Jobs in Chicago, IL

Design Engineer I

Cary, IL · On-site

$88K - $165K/yr

... Cadence Design Systems Palladium platform... As such we are seeking an experienced DFT engineer ... Please note that the salary range is a guideline and compensation may vary based on factors such as ...

Fpga Design Engineer

Schaumburg, IL · On-site

$55 - $80/hr

FPGA Design Engineer We are seeking a skilled FPGA Design Engineer to join a leading defense ... The position is based in Illinois and requires obtaining a Secret clearance. Responsibilities

Senior Design Engineer

Wheaton, IL · On-site

$130K - $165K/yr

The Will Group is seeking a Senior Design Engineer - Electrical Distribution to help lead utility ... against applicants based on protected characteristics and complies fully with all applicable ...

Senior Design Engineer

Chicago, IL · On-site

$180K - $240K/yr

About the role: We're looking for a Senior Design Engineer to own the craft and feel of AssemblyAI ... Our salary ranges are based on paying competitively for our size, stage, and industry, and are one ...

Mechanical Design Engineer The Mechanical Design Engineer develops advanced mechanical designs for ... Job Type & Location This is a Permanent position based out of West Chicago, IL. Pay and Benefits ...

Mechanical Design Engineer The Mechanical Design Engineer develops advanced mechanical designs for ... Job Type & Location This is a Permanent position based out of St. Charles, IL. Pay and Benefits The ...

Perform engineering and design assignments for transportation and traffic projects. * Prepare ... Employment decisions are based on merit and qualifications, in full compliance with all applicable ...

Perform engineering and design assignments for transportation and traffic projects. * Prepare ... Employment decisions are based on merit and qualifications, in full compliance with all applicable ...

Mechanical Design Engineer

Rolling Meadows, IL · On-site

$76K - $103K/yr

Position Summary The Mechanical Design Engineer designs, improves, and releases Spartanics ... Responsibilities may change based on business needs. Reasonable accommodations may be made to ...

Perform engineering and design assignments for transportation and traffic projects. * Prepare ... Employment decisions are based on merit and qualifications, in full compliance with all applicable ...

Perform engineering and design assignments for transportation and traffic projects. * Prepare ... Employment decisions are based on merit and qualifications, in full compliance with all applicable ...

Mechanical Design Engineer II The Mechanical Design Engineer II within our Production Engineering ... Pay is based upon candidate skills, experience, and qualifications. This position is eligible for ...

New

Sr. Design Engineer

Harwood Heights, IL · On-site

$119K - $178K/yr

Job Summary A Sr. Design Engineer is responsible for the design, development, and continuous ... Our employment decisions are based on merit, qualifications, and business needs, without regard to ...

Sr. Design Engineer

Harwood Heights, IL · On-site

$119K - $178K/yr

Job Summary A Sr. Design Engineer is responsible for the design, development, and continuous ... Our employment decisions are based on merit, qualifications, and business needs, without regard to ...

Showing results 41-60

Home Based Memory Design Engineer information

See Chicago, IL salary details

$82.9K

$145.6K

$299.3K

How much do home based memory design engineer jobs pay per year?

As of Sep 5, 2026, the average yearly pay for home based memory design engineer in Chicago, IL is $145,612.00, according to ZipRecruiter salary data. Most workers in this role earn between $97,900.00 and $162,800.00 per year, depending on experience, location, and employer.

What is a home based memory design engineer?

A home based memory design engineer develops and optimizes memory components such as RAM and flash memory for electronic devices, often working remotely. They use specialized design software, collaborate with hardware teams, and may require knowledge of semiconductor physics and circuit design. This role typically involves remote communication and adherence to industry standards.

What are the most commonly searched types of Memory Design Engineer jobs in Chicago, IL?

The most popular types of Memory Design Engineer jobs in Chicago, IL are:

Infographic showing various Home Based Memory Design Engineer job openings in Chicago, IL as of August 2026, with employment types broken down into 84% Full Time, 12% Part Time, and 4% Contract. Highlights an 84% In-person, 8% Hybrid, and 8% Remote job distribution, with an average salary of $145,612 per year, or $70 per hour.

$88K - $165K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 10 days ago


Cadence Design Systems rating

9.0

Company rating: 9.0 out of 10

Based on 5 frontline employees who took The Breakroom Quiz

33rd of 247 rated software companies


Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

We are a small group of individuals designing among the most complex chip in the world getting into the award-winning Cadence Design Systems Palladium platform...

As such we are seeking an experienced DFT engineer which role will span across the full spectrum of the DFT implementation: from architecture definition through silicon testing and debug.

A bonus, this individual will have cross functional teams' interactions not only within our group; but across Cadence and the multiple BU involved in our developments.

Key responsibilities:

  • Define and implement SoC level DFT architecture for large and complex designs.
  • Develop, integrate, and support SCAN, ATPG, MBIST, BSCAN and iJTAG.
  • Perform DFT insertion, verification, and coverage analysis at block and SoC levels.
  • Drive pre-silicon DFT sign-off, including DRC closure and coverage targets.
  • Support post-silicon debug, failure analysis and yield learning.
  • Collaborate with RTL, verification, physical design and operation teams.

Qualifications:

  • BS degree
  • At least 3 years of hands-on experience in SoC DFT.

Must-have skills:

  • Strong expertise in SCAN, ATPG, MBIST.
  • Experience with pre-silicon validation and post-silicon debug.
  • Strong problem solving and debugging skills.
  • Ability to work effectively in a cross-functional engineering environment.

Good-to-have skills:

  • Scripting experience (TCL, Perl, Python or equivalent) for flow automation and analysis.
  • Experience with IP-level DFT integration and reuse.
  • Exposure to low-power DFT considerations and complex clocking architectures.
  • Familiarity with manufacturing test flows and silicon yield improvement.

The annual salary range for California is $88,900 to $165,100. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more.

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