... hardware innovations forward. Responsibilities As an RFIC Design Engineer Intern, you will: * Assist with the design and simulation of RF/analog front-end circuit blocks such as LNAs, mixers ...
... hardware innovations forward. Responsibilities As an RFIC Design Engineer Intern, you will: * Assist with the design and simulation of RF/analog front-end circuit blocks such as LNAs, mixers ...
RFIC Design Intern
San Jose, CA · On-site
... hardware innovations forward. Responsibilities As an RFIC Design Engineer Intern, you will: * Assist with the design and simulation of RF/analog front-end circuit blocks such as LNAs, mixers ...
RFIC Design Intern
San Jose, CA · On-site
... hardware innovations forward. Responsibilities As an RFIC Design Engineer Intern, you will: * Assist with the design and simulation of RF/analog front-end circuit blocks such as LNAs, mixers ...
$50/hr
As a Physical Design Intern, you'll work hands-on from synthesis through tapeout, collaborating with top engineers to optimize some of the most advanced silicon in the world. This role is onsite ...
$50/hr
As a Physical Design Intern, you'll work hands-on from synthesis through tapeout, collaborating with top engineers to optimize some of the most advanced silicon in the world. This role is onsite ...
AI Research Intern: Hardware Design & ML
Palo Alto, CA · On-site
$60 - $80/hr
Architect Labs in Palo Alto is looking for a Research Intern to assist the founding team in advancing AI models for chip design. This 3-month role involves conducting experiments that influence the ...
New
AI Research Intern: Hardware Design & ML
Palo Alto, CA · On-site
$60 - $80/hr
Architect Labs in Palo Alto is looking for a Research Intern to assist the founding team in advancing AI models for chip design. This 3-month role involves conducting experiments that influence the ...
New
We are seeking a highly motivated Hardware Design Verification Engineering intern/co-op to join our team and work towards design, built, and delivery of AMD's high-end Machine Intelligence products.
We are seeking a highly motivated Hardware Design Verification Engineering intern/co-op to join our team and work towards design, built, and delivery of AMD's high-end Machine Intelligence products.
2027 Masters Hardware Design Verification Engineering Co-op/Intern
San Jose, CA · On-site
$19.75 - $25.50/hr
We are seeking a highly motivated Hardware Design Verificaon engineering intern/co-op to join our team and work towards design, built, and delivery of AMD's high-end Machine Intelligence products. In ...
2027 Masters Hardware Design Verification Engineering Co-op/Intern
San Jose, CA · On-site
$19.75 - $25.50/hr
We are seeking a highly motivated Hardware Design Verificaon engineering intern/co-op to join our team and work towards design, built, and delivery of AMD's high-end Machine Intelligence products. In ...
2027 Undergrad Hardware Design Verification Engineering Co-op/Intern
Santa Clara, CA · On-site
$19.75 - $25.50/hr
We are seeking a highly motivated Hardware Design Verification Engineering intern/co-op to join our team and work towards design, built, and delivery of AMD's high-end Machine Intelligence products.
2027 Undergrad Hardware Design Verification Engineering Co-op/Intern
Santa Clara, CA · On-site
$19.75 - $25.50/hr
We are seeking a highly motivated Hardware Design Verification Engineering intern/co-op to join our team and work towards design, built, and delivery of AMD's high-end Machine Intelligence products.
We are seeking a highly motivated Hardware Design Verificaon engineering intern/co-op to join our team and work towards design, built, and delivery of AMD's high-end Machine Intelligence products. In ...
We are seeking a highly motivated Hardware Design Verificaon engineering intern/co-op to join our team and work towards design, built, and delivery of AMD's high-end Machine Intelligence products. In ...
2027 Undergrad Hardware Design Verification Engineering Co-op/Intern
San Jose, CA · On-site
$19.75 - $25.50/hr
We are seeking a highly motivated Hardware Design Verification Engineering intern/co-op to join our team and work towards design, built, and delivery of AMD's high-end Machine Intelligence products.
2027 Undergrad Hardware Design Verification Engineering Co-op/Intern
San Jose, CA · On-site
$19.75 - $25.50/hr
We are seeking a highly motivated Hardware Design Verification Engineering intern/co-op to join our team and work towards design, built, and delivery of AMD's high-end Machine Intelligence products.
2027 Masters Hardware Design Verification Engineering Co-op/Intern
Santa Clara, CA · On-site
$19.75 - $25.50/hr
We are seeking a highly motivated Hardware Design Verificaon engineering intern/co-op to join our team and work towards design, built, and delivery of AMD's high-end Machine Intelligence products. In ...
2027 Masters Hardware Design Verification Engineering Co-op/Intern
Santa Clara, CA · On-site
$19.75 - $25.50/hr
We are seeking a highly motivated Hardware Design Verificaon engineering intern/co-op to join our team and work towards design, built, and delivery of AMD's high-end Machine Intelligence products. In ...
Analog/Mixed-Signal Design Intern focusing on key circuit blocks in an analog signal processing ... We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by ...
Analog/Mixed-Signal Design Intern focusing on key circuit blocks in an analog signal processing ... We strongly believe that the pace of the ongoing hardware revolution will be greatly accelerated by ...
Hardware Test Intern [Fall 2026]
San Jose, CA · On-site
$35 - $45/hr
Design and build custom scalable test stations to perform functional, performance, and reliability testing on key robotic sub-assemblies. * Develop mechanical and electrical systems incorporating ...
Hardware Test Intern [Fall 2026]
San Jose, CA · On-site
$35 - $45/hr
Design and build custom scalable test stations to perform functional, performance, and reliability testing on key robotic sub-assemblies. * Develop mechanical and electrical systems incorporating ...
Platform Technologies Language Design Intern
Berkeley, CA · On-site
$32.40 - $39/hr
Adding features to or enhancing the Chisel language for better design and verification As an Intern ... Exposure to hardware design and verification techniques is a plus but not required. Pay & Benefits ...
Platform Technologies Language Design Intern
Berkeley, CA · On-site
$32.40 - $39/hr
Adding features to or enhancing the Chisel language for better design and verification As an Intern ... Exposure to hardware design and verification techniques is a plus but not required. Pay & Benefits ...
Hardware Test Intern [Fall 2026]
San Jose, CA · On-site
$35 - $45/hr
Design and build custom scalable test stations to perform functional, performance, and reliability testing on key robotic sub-assemblies. * Develop mechanical and electrical systems incorporating ...
Hardware Test Intern [Fall 2026]
San Jose, CA · On-site
$35 - $45/hr
Design and build custom scalable test stations to perform functional, performance, and reliability testing on key robotic sub-assemblies. * Develop mechanical and electrical systems incorporating ...
Hardware Test & Reliability Intern
San Mateo, CA · On-site
$65 - $80/hr
We are seeking a driven and cross-functional engineering intern to help the development and ... Own the design and implementation of hardware and software systems to execute comprehensive ...
Hardware Test & Reliability Intern
San Mateo, CA · On-site
$65 - $80/hr
We are seeking a driven and cross-functional engineering intern to help the development and ... Own the design and implementation of hardware and software systems to execute comprehensive ...
Platform Technologies Language Design Intern
Santa Clara, CA · On-site
$32.40 - $39/hr
Adding features to or enhancing the Chisel language for better design and verification As an Intern ... Exposure to hardware design and verification techniques is a plus but not required. Pay & Benefits ...
Platform Technologies Language Design Intern
Santa Clara, CA · On-site
$32.40 - $39/hr
Adding features to or enhancing the Chisel language for better design and verification As an Intern ... Exposure to hardware design and verification techniques is a plus but not required. Pay & Benefits ...
Hardware Test & Reliability Intern
San Mateo, CA · On-site
$58/hr
We are seeking a driven and cross-functional engineering intern to help the development and ... Own the design and implementation of hardware and software systems to execute comprehensive ...
Hardware Test & Reliability Intern
San Mateo, CA · On-site
$58/hr
We are seeking a driven and cross-functional engineering intern to help the development and ... Own the design and implementation of hardware and software systems to execute comprehensive ...
Platform Technologies Language Design Intern
Santa Clara, CA · On-site
$32.40 - $39/hr
Adding features to or enhancing the Chisel language for better design and verification As an Intern ... Exposure to hardware design and verification techniques is a plus but not required. Pay & Benefits ...
Platform Technologies Language Design Intern
Santa Clara, CA · On-site
$32.40 - $39/hr
Adding features to or enhancing the Chisel language for better design and verification As an Intern ... Exposure to hardware design and verification techniques is a plus but not required. Pay & Benefits ...
PD Intern
San Jose, CA · On-site
About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks ... Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ...
PD Intern
San Jose, CA · On-site
About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks ... Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ...
PD Intern
San Jose, CA · On-site
About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks ... Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ...
Quick apply
PD Intern
San Jose, CA · On-site
About Etched Etched is building hardware for frontier intelligence. We co-design chips, racks ... Job Summary As a Physical Design intern for Etched, you will be responsible for realizing our ...
Hardware Design Intern information
What does a hardware design intern do?
What types of projects and responsibilities can a hardware design intern expect to work on during their internship?
What are the key skills and qualifications needed to thrive as a hardware design intern, and why are they important?
What are the most commonly searched types of Hardware Design jobs in California?
The most popular types of Hardware Design jobs in California are:
What are popular job titles related to Hardware Design Intern jobs in California?
For Hardware Design Intern jobs in California, the most frequently searched job titles are:
What job categories do people searching Hardware Design Intern jobs in California look for?
The top searched job categories for Hardware Design Intern jobs in California are:
- Senior Remote Mechanical Engineering Internships
- Chemical Engineer Student Summer
- Intern Aerotech Engineering
- Rtl Logic Design Intern
- Internship Ansys Internship
- Mechanical Engineering Intern Summer
- Internship Distributed Antenna System
- Internship Verilog Intern
- Internship Freelance Surface Pattern Design
- Electronic Engineer Intern
What cities in California are hiring for Hardware Design Intern jobs?
Cities in California with the most Hardware Design Intern job openings:

Full-time
Re-posted 6 days ago
Job description
We are seeking a motivated RFIC Design Engineer Intern to support the development, simulation, and validation of RF integrated circuits for next-generation wireless and satellite communications applications. This internship is ideal for a student with strong fundamentals in analog/RF circuit design who wants hands-on experience working with experienced RFIC engineers on real product development and help push new hardware innovations forward.
Responsibilities
As an RFIC Design Engineer Intern, you will:
- Assist with the design and simulation of RF/analog front-end circuit blocks such as LNAs, mixers, oscillators, PLLs, PAs, VGAs, switches, etc.
- Perform circuit RF simulations including S-parameters, noise figure, gain, linearity, stability, power consumption, etc.
- Support layout reviews, parasitic extraction, and post-layout simulations.
- Assist in the analysis of 2.5D and 3D EM circuit models and simulation outcomes.
- Work across a cross-functional collaborative team of bright RF engineers.
- Prepare technical documents and reports, and participate in design reviews and brainstorming sessions.
We are considering full-time/ part-time applicants for Fall 2026.
The ideal candidate will have strong technical competency, curiosity, and the ability to take the lead and ownership of a well-defined project. They should also be excited to adapt, learn quickly, and grow in a fast-paced startup environment.
Requirements
- Currently pursuing a M.S., or Ph.D. in Electrical Engineering with 2+ years of RFIC design experience.
- Strong background in RF state-of-the-art CMOS, SOI, or SiGe technologies
- Proficient in RFIC design and characterization tools such as Cadence Virtuoso, Spectre RF, ADS, or similar.
- Deep understanding of system specifications and capable of translating system requirements into circuit requirements at IC level.
- Experience with RFIC layout and post-layout simulation.
- Experience with Python, MATLAB, or scripting for data analysis and automation.
- Prior research, or tapeout experience in RF/analog IC design.
- Comfortable working and solving problems independently as well as collaboratively within a team.
- Strong written and oral communication skills in English and comfortable explaining technical concepts to the rest of the team.
Benefits
- Paid, full-time, onsite internship at our Bay Area, CA location with competitive salary
- Opportunity to work with a collaborative and ambitious team developing disruptive products.
- Opportunities for growth, leadership, and project ownership in a dynamic startup environment.