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Graduate Design Engineer Jobs in California (NOW HIRING)

Micron

Design Engineer - Pathfinding Design

Folsom, CA · On-site

$100K - $213K/yr

MSEE + 5 years' post-graduate mix-signal or analog IC design experience * 5+ years of exposure to circuit debugging in collaboration with other engineering teams. * Performing verification processes ...

Apple

RF Passive Design Engineer

San Diego, CA

$122K - $214K/yr

We are looking to hire a Chip Passive Design Engineer in a group at Apple that develops RF/AMS ... Excellent academic background with industry related work experience beyond graduate school studies.

Flux

Aviation Design Engineer/Manager

San Francisco, CA · On-site

$130K/yr

Overview We are seeking an Aviation Design Engineer/Manager to join one of our clients in San ... Graduate degree preferred. Management coursework and/or MBA a plus. * Requires 10 years' experience ...

Apple

RF Passive Design Engineer

San Diego, CA · On-site

We are looking to hire a Chip Passive Design Engineer in a group at Apple that develops RF/AMS ... Excellent academic background with industry related work experience beyond graduate school studies.

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How much do graduate design engineer jobs pay per year?

As of Jul 14, 2026, the average yearly pay for graduate design engineer in California is $86,995.00, according to ZipRecruiter salary data. Most workers in this role earn between $67,100.00 and $97,200.00 per year, depending on experience, location, and employer.
What cities in California are hiring for Graduate Design Engineer jobs? Cities in California with the most Graduate Design Engineer job openings:
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Analog Circuit Design Engineer (Graduate Intern)

Analog Circuit Design Engineer (Graduate Intern)

Intel

Folsom, CA • On-site

$89K - $120K/yr

Full-time

Medical, Retirement, PTO

This job post has expired today. Applications are no longer accepted.

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 146 frontline employees who took The Breakroom Quiz

11th of 142 rated electronics manufacturers

Job description

Job Details:Job Description: 

The Role and Impact
Are you ready to launch your career in an environment that pushes the boundaries of innovation? As a Circuit Design Engineering Graduate Intern, you will play a pivotal role in shaping Intel's next-generation technologies. This exciting opportunity allows you to contribute to the design, simulation, and verification of digital and/or analog circuits, ensuring robust circuit implementation and integration. You will engage in hands-on projects that align with Intel's mission to develop cutting-edge solutions, while building skills that will shape your future in the semiconductor industry. Join us and make a meaningful impact on the technology that powers the future.
Key Responsibilities

  • Assist in designing, simulating, and verifying digital and/or analog circuits to meet Intel's high-performance standards.
  • Contribute to schematic entry, timing analysis, and optimization for power, performance, and area.
  • Perform noise glitch and signal integrity analysis to ensure robust circuit designs.
  • Collaborate with cross-functional teams to identify and implement innovative solutions for low-power and high-performance designs.
  • Perform debugging, hardware simulations, and circuit testing to validate design functionality.
  • Utilize and navigate EDA tools to execute floor planning and clock gating tasks.
  • Apply semiconductor device physics knowledge to analyze and improve circuit tradeoffs.
  • Continuously learn, adapt, and contribute to process improvements in alignment with Intel's culture of innovation.
Qualifications:

The Minimum qualifications are required to be initially considered for this position. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

This position is not eligible for Intel immigration sponsorship.

Minimum Qualifications

  • Must be pursuing a Master's or a Ph.D. degree in Electrical/Computer/Software Engineering, Computer Science, or related field of study
  • Proficiency in digital and/or analog circuit design principles and fundamentals.
  • Hands-on experience or knowledge of EDA tools, including circuit simulation and verification tools.
  • Knowledge of CMOS technologies and microarchitecture fundamentals.
  • Familiarity with power and performance analysis and optimization techniques.
  • Understanding of signal and power integrity concepts.
  • Coursework or experience in semiconductor device physics.

Preferred Qualifications

  • Strong analytical and problem-solving skills with attention to detail.
  • Excellent verbal and written communication skills to collaborate effectively within a team.
  • A passion for continuous learning and improvement.
  • Demonstrated ability to apply disciplined execution and technical rigor to projects.
  • Exposure to debugging complex hardware systems.

At Intel, we are committed to empowering you to explore and grow your potential in a dynamic, collaborative, and innovative environment. If you are excited about solving real-world challenges and want to make an impact in the semiconductor industry, we encourage you to apply and begin your journey with us.

Job Type:Student / InternShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:US, California, FolsomBusiness group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $89,200.00-120,700.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Our standard internship rates are based on your degree, location, and the job role. Your recruiter can share more about the specific compensation range for your preferred location and job role during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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