Engineering Time Type: Full time Minimum Clearance Required to Start: None Employee Type: Regular ... Design distributed software architectures spanning multiple processing domains (x86, ARM, FPGA ...
Engineering Time Type: Full time Minimum Clearance Required to Start: None Employee Type: Regular ... Design distributed software architectures spanning multiple processing domains (x86, ARM, FPGA ...
... Full Time W-2 or Contract Rate: open to Negotiation Benefits: including Health, Dental Vision, PTO ... Perform parts selection, trade studies, and component-level design evaluations. * Develop hardware ...
... Full Time W-2 or Contract Rate: open to Negotiation Benefits: including Health, Dental Vision, PTO ... Perform parts selection, trade studies, and component-level design evaluations. * Develop hardware ...
Firmware Engineer 4
San Diego, CA · On-site
$175K - $225K/yr
Develop FPGA based solutions utilizing hybrid C/C++ microprocessor and HDL fabric architectures ... trade-studies and down-selects. * Work with program management and project engineers to develop ...
Firmware Engineer 4
San Diego, CA · On-site
$175K - $225K/yr
Develop FPGA based solutions utilizing hybrid C/C++ microprocessor and HDL fabric architectures ... trade-studies and down-selects. * Work with program management and project engineers to develop ...
Firmware Engineer 4
San Diego, CA · Hybrid
$175K - $225K/yr
Develop FPGA based solutions utilizing hybrid C/C++ microprocessor and HDL fabric architectures ... trade-studies and down-selects. * Work with program management and project engineers to develop ...
Firmware Engineer 4
San Diego, CA · Hybrid
$175K - $225K/yr
Develop FPGA based solutions utilizing hybrid C/C++ microprocessor and HDL fabric architectures ... trade-studies and down-selects. * Work with program management and project engineers to develop ...
Firmware Engineer 4
San Diego, CA · On-site
$175K - $225K/yr
Develop FPGA based solutions utilizing hybrid C/C++ microprocessor and HDL fabric architectures ... trade-studies and down-selects. * Work with program management and project engineers to develop ...
Quick apply
Firmware Engineer 4
San Diego, CA · On-site
$175K - $225K/yr
Develop FPGA based solutions utilizing hybrid C/C++ microprocessor and HDL fabric architectures ... trade-studies and down-selects. * Work with program management and project engineers to develop ...
C++ Software Engineer
Chicago, IL · On-site
$100K - $140K/yr
Technology Employment Type: Full Time Location: Chicago, IL Description At Wolverine Trading we're ... Collaborate with FPGA engineers, hardware specialists, and systems teams to push performance ...
C++ Software Engineer
Chicago, IL · On-site
$100K - $140K/yr
Technology Employment Type: Full Time Location: Chicago, IL Description At Wolverine Trading we're ... Collaborate with FPGA engineers, hardware specialists, and systems teams to push performance ...
Digital Design Engineer Intern
$19 - $35/hr
At ADI, our goal is to develop our interns so they are the first to be considered for full-time ... Participate in FPGA prototyping and testing for rapid design validation * Collaborate with senior ...
Digital Design Engineer Intern
$19 - $35/hr
At ADI, our goal is to develop our interns so they are the first to be considered for full-time ... Participate in FPGA prototyping and testing for rapid design validation * Collaborate with senior ...
Digital Design Engineer Intern
Durham, NC · On-site
$19 - $35/hr
At ADI, our goal is to develop our interns so they are the first to be considered for full-time ... Participate in FPGA prototyping and testing for rapid design validation * Collaborate with senior ...
Digital Design Engineer Intern
Durham, NC · On-site
$19 - $35/hr
At ADI, our goal is to develop our interns so they are the first to be considered for full-time ... Participate in FPGA prototyping and testing for rapid design validation * Collaborate with senior ...
Digital Design Engineer Intern
$19 - $35/hr
At ADI, our goal is to develop our interns so they are the first to be considered for full-time ... Participate in FPGA prototyping and testing for rapid design validation * Collaborate with senior ...
Digital Design Engineer Intern
$19 - $35/hr
At ADI, our goal is to develop our interns so they are the first to be considered for full-time ... Participate in FPGA prototyping and testing for rapid design validation * Collaborate with senior ...
PE Logic Design
Hillsboro, OR · Hybrid
$127K - $236K/yr
Analyze performance, power, and area (PPA) trade-offs and drive design decisions based on ... The US salary range for this full-time position is $127,400 to $236,600
PE Logic Design
Hillsboro, OR · Hybrid
$127K - $236K/yr
Analyze performance, power, and area (PPA) trade-offs and drive design decisions based on ... The US salary range for this full-time position is $127,400 to $236,600
Principal Logic Design Engineer
Hillsboro, OR · Hybrid
$127K - $287K/yr
Analyze performance, power, and area (PPA) trade-offs and drive design decisions based on ... The US salary range for this full-time position is $127,400 to $287,600
Principal Logic Design Engineer
Hillsboro, OR · Hybrid
$127K - $287K/yr
Analyze performance, power, and area (PPA) trade-offs and drive design decisions based on ... The US salary range for this full-time position is $127,400 to $287,600
Hardware Engineer
Chicago, IL · On-site
$127K - $167K/yr
Develop new functionality that supports evolving trading and infrastructure requirements ... FPGA development experience with relevant ASIC design exposure * Familiarity with PMA (Physical ...
Hardware Engineer
Chicago, IL · On-site
$127K - $167K/yr
Develop new functionality that supports evolving trading and infrastructure requirements ... FPGA development experience with relevant ASIC design exposure * Familiarity with PMA (Physical ...
Principal Logic Design Engineer
Hillsboro, OR · Hybrid
$127K - $287K/yr
Analyze performance, power, and area (PPA) trade-offs and drive design decisions based on ... Solid communication and project management skills * 10+ years of logic design experience (ASIC/FPGA ...
Principal Logic Design Engineer
Hillsboro, OR · Hybrid
$127K - $287K/yr
Analyze performance, power, and area (PPA) trade-offs and drive design decisions based on ... Solid communication and project management skills * 10+ years of logic design experience (ASIC/FPGA ...
Principal Radar Engineer- MTI
Redmond, WA · On-site
$195K - $250K/yr
Lead waveform, processing, detection-threshold, and tracker trade studies to optimize mission ... Partner with RF/antenna, FPGA, software, and systems teams to implement and validate algorithms on ...
Principal Radar Engineer- MTI
Redmond, WA · On-site
$195K - $250K/yr
Lead waveform, processing, detection-threshold, and tracker trade studies to optimize mission ... Partner with RF/antenna, FPGA, software, and systems teams to implement and validate algorithms on ...
Principal Radar Engineer- MTI
Redmond, WA · On-site
$195K - $250K/yr
Lead waveform, processing, detection-threshold, and tracker trade studies to optimize mission ... Partner with RF/antenna, FPGA, software, and systems teams to implement and validate algorithms on ...
Principal Radar Engineer- MTI
Redmond, WA · On-site
$195K - $250K/yr
Lead waveform, processing, detection-threshold, and tracker trade studies to optimize mission ... Partner with RF/antenna, FPGA, software, and systems teams to implement and validate algorithms on ...
Principal Radar Engineer- MTI
$195K - $250K/yr
Lead waveform, processing, detection-threshold, and tracker trade studies to optimize mission ... Partner with RF/antenna, FPGA, software, and systems teams to implement and validate algorithms on ...
Quick apply
Principal Radar Engineer- MTI
$195K - $250K/yr
Lead waveform, processing, detection-threshold, and tracker trade studies to optimize mission ... Partner with RF/antenna, FPGA, software, and systems teams to implement and validate algorithms on ...
HDL Technical Team Lead
Boulder, CO · On-site
Summary We are looking for an HDL Technical Team Lead to guide and elevate our FPGA/HDL development ... Evaluate architectural trade-offs, interfaces, and timing constraints across systems and programs
HDL Technical Team Lead
Boulder, CO · On-site
Summary We are looking for an HDL Technical Team Lead to guide and elevate our FPGA/HDL development ... Evaluate architectural trade-offs, interfaces, and timing constraints across systems and programs
Senior Design Verification Engineer
Needham, MA · On-site
$112K - $280K/yr
Verify and maintain high-performance FPGA compute and networking systems used in electronic trading ... This position requires being on-site at our office in Needham, MA full-time (5 days per week)
Senior Design Verification Engineer
Needham, MA · On-site
$112K - $280K/yr
Verify and maintain high-performance FPGA compute and networking systems used in electronic trading ... This position requires being on-site at our office in Needham, MA full-time (5 days per week)
Electronic Warfare Systems Architect
Raleigh, NC · On-site
$125K - $180K/yr
Job Type Full-time Description Since 2004, Vadum has built a brand known for practical innovation ... Hardware/Software Integration - Align algorithm development with hardware constraints (FPGA, GPU ...
Electronic Warfare Systems Architect
Raleigh, NC · On-site
$125K - $180K/yr
Job Type Full-time Description Since 2004, Vadum has built a brand known for practical innovation ... Hardware/Software Integration - Align algorithm development with hardware constraints (FPGA, GPU ...
Senior Design Verification Engineer
$112K - $280K/yr
Verify and maintain high-performance FPGA compute and networking systems used in electronic trading ... This position requires being on-site at our office in Needham, MA full-time (5 days per week)
Senior Design Verification Engineer
$112K - $280K/yr
Verify and maintain high-performance FPGA compute and networking systems used in electronic trading ... This position requires being on-site at our office in Needham, MA full-time (5 days per week)
Full Time Fpga Trading information
See salary details
$70K - $82.8K
2% of jobs
$82.8K - $95.5K
3% of jobs
$95.5K - $108.3K
9% of jobs
$108.3K - $121.1K
8% of jobs
$122.6K is the 25th percentile. Wages below this are outliers.
$121.1K - $133.9K
16% of jobs
The median wage is $142.2K / yr.
$133.9K - $146.6K
17% of jobs
$146.6K - $159.4K
13% of jobs
$166.1K is the 75th percentile. Wages above this are outliers.
$159.4K - $172.2K
13% of jobs
$172.2K - $185K
8% of jobs
$185K - $197.7K
6% of jobs
$197.7K - $210.5K
4% of jobs
$70K
$147.1K
$210.5K
How much do full time fpga trading jobs pay per year?
What is a full time FPGA trading job?
What are the key skills and qualifications needed to thrive as a full time FPGA trading engineer?
What are some typical challenges faced by full time FPGA trading engineers?
What is the difference between Full Time Fpga Trading vs Full Time Quant Trader?
| Aspect | Full Time Fpga Trading | Full Time Quant Trader |
|---|---|---|
| Required Credentials | Engineering degree, FPGA/Hardware skills | Quantitative degree, programming, statistical skills |
| Work Environment | Hardware development labs, trading floors | Research offices, trading desks |
| Industry Usage | Financial firms, hedge funds | Hedge funds, asset management firms |
Full Time Fpga Trading focuses on developing hardware solutions for trading systems, requiring engineering and FPGA expertise. In contrast, Full Time Quant Traders rely on quantitative analysis and programming skills to develop trading strategies. Both roles are integral to trading firms but differ in technical focus and daily tasks.
What cities are hiring for Full Time Fpga Trading jobs?
Cities with the most Full Time Fpga Trading job openings:
What are the most commonly searched types of Fpga Trading jobs?
The most popular types of Fpga Trading jobs are:
Senior Software Engineer - Architecture & Systems Design
Herndon, VA • On-site
Full-time
Medical, Retirement, PTO
Re-posted yesterday
Job description
Job Category: Engineering
Time Type: Full time
Minimum Clearance Required to Start: None
Employee Type: Regular
Percentage of Travel Required: None
Type of Travel: None
* * *
The Opportunity:
- Design, architect, and implement complex embedded RF systems as part of a multi-disciplinary team working on specialized tools, sensors, and communications devices for demanding applications
- Contribute to software architecture decisions for inter-processor and microservice systems where your technical choices directly impact system performance, real-time behavior, and the ability to process high-rate RF data in resource-constrained environments
- Work with engineers across the full embedded system stack-from signal processing algorithms to FPGA fabric, from application layer to hardware interfaces
- Own technical design from initial architecture through production deployment, making practical trade-offs between competing constraints like schedule, performance, portability, and maintainability
Responsibilities:
- Design distributed software architectures spanning multiple processing domains (x86, ARM, FPGA fabric), defining communication patterns and data flows for real-time RF signal processing systems
- Develop high-performance C++ frameworks for inter-processor communication in systems where latency and throughput are critical constraints
- Create technical documentation including message sequence charts, UML class diagrams, and software architecture specifications that enable distributed teams to build complex systems correctly and efficiently
- Design microservice architectures for x86 and ARM platforms, balancing modularity, performance, and resource constraints
- Profile and optimize software for memory-bound and compute-bound workloads using tools like vTune, identifying bottlenecks and implementing measurable performance improvements
- Work with signal processing engineers to design data pipelines that move RF samples from ADCs through filters, demodulators, and decoders
- Develop debugging approaches for resource-constrained embedded systems where standard tools provide limited visibility
- Build C++/Python test harnesses and unit tests that generate representative workloads, validate system behavior, and verify edge cases
- Integrate modern development tools and practices including CI/CD pipelines, containerization, and build automation
- Collaborate with FPGA engineers to define hardware/software interfaces that leverage programmable logic capabilities while maintaining software flexibility
Qualifications:
Required:
- 5-7+ years of professional software engineering experience in embedded systems and/or high-performance computing in Linux based environments
- BS or MS in Computer Science, Software Engineering, Electrical or Computer Engineering, or related field
- Strong proficiency in C++ development for embedded real-time systems, including concurrency, memory management, and optimization techniques
- Demonstrated experience designing and implementing software architectures and communicating technical concepts through documentation and diagrams
- Experience with multi-threaded application development and debugging concurrency issues, including race conditions in inter-processor and microservice architectures
- Working knowledge of software design patterns and development methodologies for complex systems
- Experience with modern build systems and DevOps tools (Conan, Docker, GitLab or similar)
- Experience with performance analysis and debugging tools (vTune, perf, gdb, valgrind, or similar) to identify and optimize bottlenecks
- Ability to make informed trade-offs between portability, performance, and architecture-specific optimizations
- Must be a US Citizen
Desired:
- Experience with communications systems and digital signal processing, including filters, modulation/demodulation schemes, channel equalization, and forward error correction (FEC)
- Experience with wireless communications protocols (3GPP, IEEE 802.11, IEEE 802.15)
- Understanding of the signal processing pipeline from RF data collection through digital processing
What You Can Expect:
A culture of integrity.
At CACI, we place character and innovation at the center of everything we do. As a valued team member, you'll be part of a high-performing group dedicated to our customer's missions and driven by a higher purpose - to ensure the safety of our nation.
An environment of trust.
CACI values the unique contributions that every employee brings to our company and our customers - every day. You'll have the autonomy to take the time you need through a unique flexible time off benefit and have access to robust learning resources to make your ambitions a reality.
A focus on continuous growth.
Together, we will advance our nation's most critical missions, build on our lengthy track record of business success, and find opportunities to break new ground - in your career and in our legacy.
Pay Range:
There are a host of factors that can influence final salary including, but not limited to, geographic location, Federal Government contract labor categories and contract wage rates, relevant prior work experience, specific skills and competencies, education, and certifications. Our employees value the flexibility at CACI that allows them to balance quality work and their personal lives. We offer competitive compensation, benefits and learning and development opportunities. Our broad and competitive mix of benefits options is designed to support and protect employees and their families. At CACI, you will receive comprehensive benefits such as; healthcare, wellness, financial, retirement, family support, continuing education, and time off benefits.
The proposed salary range for this position is:
$94,400 - $198,200
CACI is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, age, national origin, disability, status as a protected veteran, or any other protected characteristic.