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Fpga Rfsoc Jobs in Baltimore, MD (NOW HIRING)

Fpga Rfsoc information

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$84.5K

$146.4K

$197.2K

How much do fpga rfsoc jobs pay per year?

As of Aug 1, 2026, the average yearly pay for fpga rfsoc in Baltimore, MD is $146,378.00, according to ZipRecruiter salary data. Most workers in this role earn between $129,200.00 and $165,900.00 per year, depending on experience, location, and employer.

What are FPGA RFSoCs?

FPGA RFSoCs, or Field Programmable Gate Array Radio Frequency System-on-Chip devices, are integrated circuits that combine programmable logic (FPGA) with high-speed analog-to-digital converters (ADC) and digital-to-analog converters (DAC) on a single chip. These devices are designed to handle radio frequency (RF) signal processing directly within the FPGA, reducing system complexity and latency. RFSoCs are commonly used in wireless communications, radar, and other applications that require high-performance, real-time processing of RF signals. They offer flexibility for rapid prototyping and deployment of complex RF systems.

What are the key skills and qualifications needed to thrive as an FPGA RFSoC Engineer, and why are they important?

To thrive as an FPGA RFSoC Engineer, you need a solid background in digital design, signal processing, and embedded systems, typically supported by a degree in electrical engineering or related fields. Proficiency with hardware description languages (such as VHDL or Verilog), Xilinx RFSoC development tools, and simulation software is essential. Strong problem-solving abilities, attention to detail, and effective teamwork set standout professionals apart in this role. These skills and qualities ensure the development of robust, high-performance FPGA solutions for demanding radio-frequency applications.

What are some common challenges faced when working with RFSoC FPGAs in a development team?

Engineers working with RFSoC (Radio Frequency System-on-Chip) FPGAs often encounter challenges such as integrating high-speed analog and digital components, managing power consumption, and ensuring signal integrity. Collaboration is key, as projects typically require close coordination between hardware, firmware, and software teams to optimize overall system performance. Additionally, staying updated with evolving toolchains and verification methodologies is crucial for successful project delivery and professional growth.
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Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 7 days ago


Johns Hopkins Applied Physics Laboratory rating

9.6

Company rating: 9.6 out of 10

Based on 8 frontline employees who took The Breakroom Quiz

1st of 72 rated research


Job description

Description
Would you be excited to build communications/networking architectures across hardware/firmware/software boundaries?
Are you interested in trying novel, creative, and risky approaches for communications systems to solve and overcome mission critical challenges?
Would you enjoy rapid prototyping of ideas on both novel and deployed RF hardware/systems?
If so, we're looking for someone like you to join our team at APL!
We are seeking an RF Communications Engineer to contribute to communications system design, implementation, hardware test/evaluation, FPGA firmware, real-time embedded software, and more. As part of our team, you will make critical contributions to both new and legacy communications systems and work on a variety of projects in a fast-paced team environment.
As an RF Communications Engineer, you will ...
  • Work with multi-disciplinary teams in designing, implementing, and analyzing systems/algorithms for future resilient, secure, and adaptive communications networks operating in highly contested environments
  • Develop FPGA firmware (VHDL) from concept through implementation, evaluation, and deployment
  • Contribute to MATLAB modeling and simulation
  • Validate and analyze performance of prototypes and tactical systems against complex operational scenarios
  • Work as part of a team to design novel solutions and approaches for size/weight/power/cost (SWaP-C) constrained communications concepts
  • Provide status updates, analysis results, and algorithms in written reports and in presentations to internal APL staff, program contractors, and government sponsors
  • Support occasional field tests for hardware testing

Qualifications
You meet our minimum qualifications for the job if you...
  • Have a BS degree in Computer Engineering, Electrical Engineering, Computer Science, or related discipline
  • Have 3+ years of experience in communications system design and digital signal processing
  • Have demonstrated experience in FPGA/firmware implementation of transceivers, link-level algorithms, and communications hardware architectures
  • Have understanding of system link budgets and analysis related to communications/RF systems
  • Have strong knowledge of RF system design principles, with hands-on experience using RF hardware and test equipment
  • Have experience in MATLAB and/or Python for algorithm development, modeling, and simulation
  • Have strong experience with FPGA firmware design and development experience using VHDL and/or Verilog
  • Have demonstrated ability to work both independently and as part of a multi-disciplinary team
  • Can effectively communicate ideas and results
  • Are able to obtain Interim Secret security clearance by your start date and can ultimately obtain Secret security clearance. If selected, you will be subject to a government security clearance investigation and must meet the requirements for access to classified information. Eligibility requirements include U.S. citizenship

You'll go above and beyond our minimum requirements if you...
  • Have an MS degree in Computer Engineering, Electrical Engineering, Computer Science, or related discipline
  • Have professional experience with designing fast and adaptive wireless modems and/or networking protocols
  • Have a deep understanding of wireless communications concepts (OFDM, MIMO, etc.)
  • Have experience implementing advanced concepts on FPGA such as transceivers, estimators, adaptive filtering techniques, error correction codes, etc.
  • Have experience with current military links (e.g. CDL, LINK16/MIDS)
  • Have experience with satellite communications systems
  • Have experience with heterogeneous (PL-PS) designs on AMD/Xilinx MPSoC/RFSoC/Versal architectures; familiarity with Petalinux/Yocto and C/C++ embedded programming experience
  • Have an active Secret security clearance

About Us
Why Work at APL?
The Johns Hopkins University Applied Physics Laboratory (APL) brings world-class expertise to our nation's most critical defense, security, space and science challenges. While we are dedicated to solving complex challenges and pioneering new technologies, what makes us truly outstanding is our culture. We offer a vibrant, welcoming atmosphere where you can bring your authentic self to work, continue to grow, and build strong connections with inspiring teammates.
At APL, we celebrate our differences of perspectives and encourage creativity and bold, new ideas. Our employees enjoy generous benefits, including a robust education assistance program, unparalleled retirement contributions, and a healthy work/life balance. APL's campus is located in the Baltimore-Washington metro area. Learn more about our career opportunities at https://www.jhuapl.edu/careers.
All qualified applicants will receive consideration for employment without regard to race, creed, color, religion, sex, gender identity or expression, sexual orientation, national origin, age, physical or mental disability, genetic information, veteran status, occupation, marital or familial status, political opinion, personal appearance, or any other characteristic protected by applicable law. APL is committed to providing reasonable accommodation to individuals of all abilities, including those with disabilities. If you require a reasonable accommodation to participate in any part of the hiring process, please contact Accessibility@jhuapl.edu.
The referenced pay range is based on JHU APL's good faith belief at the time of posting. Actual compensation may vary based on factors such as geographic location, work experience, market conditions, education/training and skill level with consideration for internal parity. For salaried employees scheduled to work less than 40 hours per week, annual salary will be prorated based on the number of hours worked. APL may offer bonuses or other forms of compensation per internal policy and/or contractual designation. Additional compensation may be provided in the form of a sign-on bonus, relocation benefits, locality allowance or discretionary payments for exceptional performance. APL provides eligible staff with a comprehensive benefits package including retirement plans, paid time off, medical, dental, vision, life insurance, short-term disability, long-term disability, flexible spending accounts, education assistance, and training and development. Applications are accepted on a rolling basis.
Minimum Rate
$85,000 Annually
Maximum Rate
$195,000 Annually

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