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Foundry Interface Jobs (NOW HIRING)

Murata Americas

Senior Staff Engineer, Foundry

San Diego, CA · On-site

$58.75 - $75.75/hr

Job Summary This position is responsible for technical aspects of the foundry interface with external SOS, Off the Shelf, and SOI foundry partners. Senior Staff Foundry Engineer will drive and lead ...

Murata America

Senior Staff Engineer, Foundry

San Diego, CA

$58.75 - $75.75/hr

Job Summary This position is responsible for technical aspects of the foundry interface with external SOS, Off the Shelf, and SOI foundry partners. Senior Staff Foundry Engineer will drive and lead ...

IT America Inc

Palantir Foundry Engineer

Nashville, TN · On-site

Palantir Foundry Engineer Location: Nashville, TN Duration: 6 Months Role Summary: Hands-on Foundry ... Applications & Interfaces: Expose ontology-backed data to Workshop/Slate apps wire Actions and AIP ...

Teledyne

Analog Design Engineer

Goleta, CA

$113K - $151K/yr

Foundry interface * Understanding and installing foundry PDKs * Tape out process * Testing and debugging of IC hardware * Communication and relationships with customer * Proficient in Windows and ...

Cspeed

Laser Design Engineer (Epi/Device)

Palo Alto, CA · On-site

In a fabless environment, simulation is the primary design tool and the foundry interface is the execution path; this engineer must be fluent in both. The right candidate brings deep device physics ...

Cspeed

Laser Design Engineer (Epi/Device)

Palo Alto, CA · On-site

In a fabless environment, simulation is the primary design tool and the foundry interface is the execution path; this engineer must be fluent in both. The right candidate brings deep device physics ...

Teledyne FLIR LLC

Analog Design Engineer

Goleta, CA · On-site

$113K - $151K/yr

Foundry interface * Understanding and installing foundry PDKs * Tape out process * Testing and debugging of IC hardware * Communication and relationships with customer * Proficient in Windows and ...

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How much do foundry interface jobs pay per hour?

As of Jun 16, 2026, the average hourly pay for foundry interface in the United States is $19.46, according to ZipRecruiter salary data. Most workers in this role earn between $16.59 and $21.39 per hour, depending on experience, location, and employer.
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Senior Foundry Engineer, Silicon Technology

Senior Foundry Engineer, Silicon Technology

Astera Labs

San Jose, CA

$122K - $168K/yr

Other

Posted 10 days ago

Job description

Job Description
We are seeking a Senior Foundry Engineer, Silicon Technology to support foundry engagement, silicon-to-model correlation, tapeout readiness, and yield improvement for advanced semiconductor products. This person will work closely with internal design, CAD layout, product engineering, test, reliability, operations teams and external foundry partners to identify risks, assess product impact, and drive timely resolution of process, PDK, model, DRC/DFM, and silicon-related issues.
 
Responsibilities Include
  • Silicon, process and yield correlation
    • Analyze process inline data, silicon test data, process drift and process correlation data 
    • Fine tune processes to optimize power, performance and yield
    • Help identify process related contributors to parametric drift, yield loss, leakage, reliability risk
    • Work with foundry and internal teams to investigate yield issues and process excursions
    • Perform layout analysis where needed to understand process sensitivity, failures
  • Tapeout and DFM support
    • Support product tapeouts, tapeout readiness reviews from a PDK, DRC/DFM, device model and reliability perspective
    • Run or coordinate DFM checks on products and summarize findings for design and layout teams
    • Coordinate between foundry and physical design teams to disposition waivers taking performance, leakage, manufacturability and reliability in mind
    • Document known PDK, model, DRC, DFM or process risks before tapeout
    • Maintain an internal PDK qualification database across foundries and process nodes to reduce tapeout risk from unnoticed PDK or model changes
  • Foundry and PDK support
    • Support technical interactions with foundry partners on PDK, device models, process assumptions, design rules, DRC/DFM decks and reliability collateral
    • Track PDK versions, model updates, DRC/DFM runset changes, and foundry signoff recommendations
    • Compare PDK changes across versions and summarize potential design, layout, model or signoff impact
  • Device model and circuit model evaluation
    • Validate model behavior across voltage bias, temperature, process corners, and relevant operating conditions
    • Compare silicon measurements against SPICE/model predictions and help identify model gaps
Basic Qualifications:
  • B.S or M.S in Electrical Engineering, Material science, Semiconductor engineering or a related technical field
  • 5+ years of experience in semiconductor device engineering, foundry interface, silicon technology, process integration, yield/process correlation
Required Experience:
  • Working knowledge of semiconductor process flows, device physics, manufacturability, reliability and yield drivers
  • Experience supporting tapeouts, PDK validation, models, DRC/DFM, silicon bring up
  • Experience analyzing silicon, wafer-level, process monitors, product test, characterization, or reliability data
  • Prior experience at a foundry, IDM, fabless semiconductor company or a PDK/enablement organization
  • Familiarity with SPICE models, process corners, device behavior, layout effects and silicon-to-model correlation
  • Ability to communicate technical issues clearly across design, CAD, layout, test, products engineering and external foundries
  • Familiarity with using TSMC as a foundry
Preferred Experience:
  • Experience with advanced FinFET, gate-all-around/nanosheet technologies and BiCMOS technologies
  • Experience with SRAM, analog/mixed signal, RF, Serdes, low power design constraints
  • Experience benchmarking foundry nodes using spice models on representative circuits
  • Experience using foundry models to simulate junction breakdowns, SOA, ESD, aging, reliability or device operating limits

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