EDA Tools Software Engineer
$149K - $284K/yr
... software engineering and design enablement/tool optimization. 10+ years of experience in the ... related EDA tools. * Experience in Industry-standard Reliability Verification, Extraction and ...
$149K - $284K/yr
... software engineering and design enablement/tool optimization. 10+ years of experience in the ... related EDA tools. * Experience in Industry-standard Reliability Verification, Extraction and ...
$149K - $284K/yr
... software engineering and design enablement/tool optimization. 10+ years of experience in the ... related EDA tools. * Experience in Industry-standard Reliability Verification, Extraction and ...
San Jose, CA · On-site
$101K - $188K/yr
Good communication skills and ability to work in a distributed software engineering team. Preferred ... Knowledge of EDA physical design algorithms, timing analysis, and multi-threading. The annual ...
San Jose, CA · On-site
$101K - $188K/yr
Good communication skills and ability to work in a distributed software engineering team. Preferred ... Knowledge of EDA physical design algorithms, timing analysis, and multi-threading. The annual ...
San Jose, CA · On-site
$101K - $188K/yr
Good communication skills and ability to work in a distributed software engineering team. Preferred ... Knowledge of EDA physical design algorithms, timing analysis, and multi-threading. The annual ...
San Jose, CA · On-site
$101K - $188K/yr
Good communication skills and ability to work in a distributed software engineering team. Preferred ... Knowledge of EDA physical design algorithms, timing analysis, and multi-threading. The annual ...
The Software Engineer, ASIC will integrate with teams across the company to build and maintain scalable EDA compute infrastructure and enhance developer experience for IC design and firmware ...
The Software Engineer, ASIC will integrate with teams across the company to build and maintain scalable EDA compute infrastructure and enhance developer experience for IC design and firmware ...
As a Software Engineer, ASIC, you will integrate tightly with teams across the company, and span ... You will: * Build and maintain scalable EDA compute infrastructure for analog and digital chip ...
As a Software Engineer, ASIC, you will integrate tightly with teams across the company, and span ... You will: * Build and maintain scalable EDA compute infrastructure for analog and digital chip ...
$114K - $141K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
Quick apply
$114K - $141K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
All of Achronix's products are supported by best-in-class EDA software tools. Position Profile Name: Application Engineer Intern Requisition No.: 7800-1031 Type of Position: Regular, Exempt Reports ...
All of Achronix's products are supported by best-in-class EDA software tools. Position Profile Name: Application Engineer Intern Requisition No.: 7800-1031 Type of Position: Regular, Exempt Reports ...
$114K - $149K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
Quick apply
$114K - $149K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
Irvine, CA · On-site
$114K - $149K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
Quick apply
Irvine, CA · On-site
$114K - $149K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
Irvine, CA · On-site
$114K - $149K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
Quick apply
Irvine, CA · On-site
$114K - $149K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
Sunnyvale, CA · On-site
$226K/yr
General Information Job Title R&D Engineering, Sr Architect Job ID 17656 City Sunnyvale State ... You Are You have spent years building EDA software that has to hold up under real-world custom IC ...
Sunnyvale, CA · On-site
$226K/yr
General Information Job Title R&D Engineering, Sr Architect Job ID 17656 City Sunnyvale State ... You Are You have spent years building EDA software that has to hold up under real-world custom IC ...
Responsibilities & SkillsLattice Semiconductor is seeking a Principal Engineer to join the team responsible for the architecture, design, and development of advanced EDA software tools for Lattice ...
Responsibilities & SkillsLattice Semiconductor is seeking a Principal Engineer to join the team responsible for the architecture, design, and development of advanced EDA software tools for Lattice ...
$114K - $149K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
Quick apply
$114K - $149K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
$114K - $141K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
Quick apply
$114K - $141K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
$114K - $149K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
Quick apply
$114K - $149K/yr
Collaborate with software engineers to define hardware/firmware interfaces and ensure seamless ... Proficiency in PCB design using Altium Designer, KiCad, or equivalent EDA software * Hands-on ...
Santa Clara, CA · On-site
$64 - $84.50/hr
Senior Software Developer - Algorithms and AI for Chip Design Automation We are looking for several ... Semiconductor design automation (EDA) software development. * Analog, custom IC, or physical design ...
Santa Clara, CA · On-site
$64 - $84.50/hr
Senior Software Developer - Algorithms and AI for Chip Design Automation We are looking for several ... Semiconductor design automation (EDA) software development. * Analog, custom IC, or physical design ...
San Jose, CA · On-site
$186K - $253K/yr
... software solutions, applying principles and techniques of computer science, engineering, and ... EDA) flow. * Optimize power, performance, and area (PPA) with large-scale statistical analysis on ...
San Jose, CA · On-site
$186K - $253K/yr
... software solutions, applying principles and techniques of computer science, engineering, and ... EDA) flow. * Optimize power, performance, and area (PPA) with large-scale statistical analysis on ...
San Jose, CA · On-site
$101K - $188K/yr
Knowledge of and experience with EDA, CAD, and/or graphic based applications. * Exposure to Cadence tools/software is a plus. The annual salary range for California is $101,500 to $188,500. You may ...
San Jose, CA · On-site
$101K - $188K/yr
Knowledge of and experience with EDA, CAD, and/or graphic based applications. * Exposure to Cadence tools/software is a plus. The annual salary range for California is $101,500 to $188,500. You may ...
San Jose, CA · On-site
... STA, EDA, or digital design concepts is a plus • Strong communication and teamwork skills ... software to accelerate innovation in the engineering design of silicon to systems. Founded in 1988 ...
San Jose, CA · On-site
... STA, EDA, or digital design concepts is a plus • Strong communication and teamwork skills ... software to accelerate innovation in the engineering design of silicon to systems. Founded in 1988 ...
$101K - $188K/yr
Knowledge of and experience with EDA, CAD, and/or graphic based applications. * Exposure to Cadence tools/software is a plus. The annual salary range for California is $101,500 to $188,500. You may ...
$101K - $188K/yr
Knowledge of and experience with EDA, CAD, and/or graphic based applications. * Exposure to Cadence tools/software is a plus. The annual salary range for California is $101,500 to $188,500. You may ...

$149K - $284K/yr
Full-time
Medical, Retirement, PTO
Re-posted 17 days ago
8.7
Based on 147 frontline employees who took The Breakroom Quiz
11th of 143 rated electronics manufacturers
Designs, develops, tests, and debugs software tools, flows, and methodologies used in design automation and by teams in the design of hardware products, process design, or manufacturing. Responsibilities include capturing user stories/requirements, writing both functional and test code, automating build and deployment, and/or performing unit, integration, and end-to-end testing of the software tools.
Qualifications:You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Master's degree in Electrical Engineering, Computer Engineering, or related engineering field with 10+ years of related experience in electrical/software engineering and design enablement/tool optimization.
10+ years of experience in the following areas:
In-depth knowledge of Semiconductor device physics, process technology, and design rules.
EM ( Electromigration) , IR drop and ESD concepts for technology/design methodologies and related EDA tools.
Experience in Industry-standard Reliability Verification, Extraction and Simulation Tools, Flows and Methodology.
Scripting skills using programming languages such as SKILL, Python, PERL, or TCL.
Preferred Qualifications:
Physical verification flows: LVS and DRC.
Tools, flows, and methodologies for optimal Product PPAC (Performance/Power/Area/Cost).
Driving cross-functional and industry-wide initiatives and taskforces.
Have experience applying AI/ML techniques for analog layout generation, automation.
Ability to apply ML to geometry and graph-based problems.
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $149,600.00-284,580.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Manufacturing
10,000+ Employees
Santa Clara, CA, US
1968