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Entrylevel Ic Layout Design Engineer Jobs (NOW HIRING)

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Analog Design Engineer Job Duties: Conduct design and development of image sensor technologies ... Layout design and floor planning. * Testing and troubleshooting power IC. * Using lab equipment ...

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Analog Design Engineer Job Duties: Conduct design and development of image sensor technologies ... Layout design and floor planning. * Testing and troubleshooting power IC. * Using lab equipment ...

... IC CAD design files using industry-standard tools, ensuring compliance with design guides, layout ... You will work independently and partner closely with Design, Process, and Software Engineers to ...

At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in engineering, electronics or science, or equivalent industry experience in a technical or scientific ...

Senior QPU Design Engineer

Bothell, WA · On-site

$126K - $240K/yr

At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in engineering, electronics or science, or equivalent industry experience in a technical or scientific ...

Senior QPU Design Engineer

Bothell, WA · On-site

$126K - $240K/yr

At least 3 years of industry experience leading complex chip design and in IC layout. * A degree in engineering, electronics or science, or equivalent industry experience in a technical or scientific ...

You will be the Printed Circuit Board (PCB) Layout Design Engineer for the Missiles & Fire Control (MFC) hardware development team. Our team delivers high density, high reliability electronics that ...

Manager/Lead Analog Design Engineer

Tempe, AZ · On-site

$193K/yr

Lead IC design projects for high-performance analog/RF circuits and systems. * Develop and verify ... Work closely with cross-functional teams, including layout, verification, and system engineering.

IC Packaging Design Engineer

Chandler, AZ · On-site

$138K/yr

IC Packaging Design Engineer LOC: Chandler, AZ or Hillsboro, OR (ONSITE) Longterm Contract - 1 Year ... Substrate design and layout * SI/PI aware design implementation * Design for performance ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... Bachelor's of Science in Electric Engineering Required. Do you have a proven track record of taking ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... Bachelor's of Science in Electric Engineering Required. Do you have a proven track record of taking ...

Drive mask design to implement layout view of designs. Top-level simulations to validate top-level ... it applies to analog IC designs Proven working experience in using spectrum analyzers ...

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Entrylevel Ic Layout Design Engineer information

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$45K

$120.8K

$185.5K

How much do entrylevel ic layout design engineer jobs pay per year?

As of Jun 18, 2026, the average yearly pay for entrylevel ic layout design engineer in the United States is $120,849.00, according to ZipRecruiter salary data. Most workers in this role earn between $90,000.00 and $144,000.00 per year, depending on experience, location, and employer.

What is the difference between Entrylevel Ic Layout Design Engineer vs Entrylevel IC Design Engineer?

AspectEntrylevel IC Layout Design EngineerEntrylevel IC Design Engineer
Primary FocusPhysical layout and placement of integrated circuitsHigh-level circuit design and architecture
Skills RequiredCAD tools, layout optimization, fabrication process knowledgeCircuit theory, HDL coding, simulation tools
Work EnvironmentDesign teams, fabrication facilities, CAD softwareDesign teams, simulation labs, EDA tools
Common CertificationsVLSI, CAD tools proficiencyVLSI, digital design certifications

The main difference is that Entrylevel IC Layout Design Engineers focus on the physical implementation of circuits, ensuring manufacturability and performance, while Entrylevel IC Design Engineers concentrate on creating circuit architectures and logic. Both roles require a strong foundation in VLSI principles and often collaborate closely in semiconductor companies.

What cities are hiring for Entrylevel Ic Layout Design Engineer jobs? Cities with the most Entrylevel Ic Layout Design Engineer job openings:
What states have the most Entrylevel Ic Layout Design Engineer jobs? States with the most job openings for Entrylevel Ic Layout Design Engineer jobs include:
Analog Design Engineer

Analog Design Engineer

OMNIVISION

Santa Clara, CA • On-site

$156K - $160K/yr

Full-time

Posted 25 days ago


Job description

Description
Job Title: Analog Design Engineer
Job Duties:
Conduct design and development of image sensor technologies, work on transistor level design of analog and mixed-signal circuits for CMOS Image Sensor such as asic_pixel array, column-amplifier, switch capacitor, comparator, ramp generator, ASRAM and XDEC by using Cadence Virtuoso. Work on whole chip floorplan design and pad frame. Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array. Collaborate with layout engineer on whole chip layout integration and improvement by Cadence Virtuoso. Perform sub-blocks and whole image sensor readout circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice. Perform design verification such as DRC, LVS, PERC check by using Siemens Caliber. Collaborate with Digital Engineer to define and design the analog to digital interface. Collaborate with verification, process, test, and application engineers to debug, characterize and optimize performance of fabricated image sensors. Propose innovative and creative solutions along with new circuit R&D and be ahead of current technology. Process the column readout data from the CMOS sensor using data processing software like Excel and MATLAB. Perform a performance check and conduct debug analysis based on the data results. Design the internal Discrete-time Circuits, Peripheral circuits and Timing control for a CMOS image sensor, including bias circuits, driver/level shifter, switched capacitor, logic gates and slew rate control.
Requirements:
Master's degree or foreign equivalent degree in Electrical Engineering, Computer Engineer, Electro-Optics, or a related field with graduate level course work of Analog IC Design, Data Converters, and VLSI Circuits and Technology.
Must possess the skills of:
  • Layout design and floor planning.
  • Testing and troubleshooting power IC.
  • Using lab equipment testing specific IC.
  • Photonic device manufacturing processes and principles, e.g. SPAD, CMOS sensors, Optical filters.
  • Matlab and Excel to do signal processing, imaging processing and data analysis.
  • Feedback, opamp, switched-capacitor circuits, layout and mismatch, and noise.
  • Data converter systems and circuits, including ADC and DAC architecture such as flash, two-step, pipelined, algorithmic, successive-approximation, R-2R DACs.
  • Analysis and design of modern digital circuits. Design and analyze CMOS digital circuit. Use commercial software Cadence.

Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.