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Entry Level Asic Design Engineer Jobs in Paramus, NJ

Ciena Corporation

THW Client Co-op

New York, NY · On-site

$27 - $37.50/hr

As a successful candidate, you will be working within the ASIC IP team with other design and verification engineers, performing digital ASIC design and verification of the Client sub-systems and ...

Ciena

THW Client Co-op

Manhattan, NY · On-site

$27 - $37.50/hr

As a successful candidate, you will be working within the ASIC IP team with other design and verification engineers, performing digital ASIC design and verification of the Client sub-systems and ...

Jane Street

Hardware Engineer (FPGA/ASIC)

New York, NY · On-site

About the Position We are looking to hire engineers with experience in both software and hardware design to help us build our FPGA or ASIC-based applications. We're big believers in the ability of ...

Jane Street

Hardware Engineer (FPGA/ASIC)

New York, NY · On-site

About the Position We are looking to hire engineers with experience in both software and hardware design to help us build our FPGA or ASIC-based applications. We're big believers in the ability of ...

MERCY COLLEGE

ASIC Engineer

Dobbs Ferry, NY · On-site

$90 - $130/hr

As part of a project team you will work alongside Senior ASIC Engineers; supporting the design, debug, validation and optimization of the products. You will be involved in projects from concept ...

Jane Street

Hardware Engineer (FPGA/ASIC)

New York, NY · On-site

We expect interns to build hardware applications from concept to a working design; your projects ... Comfortable with a software programming language * Experienced with a Hardware Description (or ...

Teledyne

Hardware Design Engineer

Chestnut Ridge, NY

$72K - $97K/yr

Master's degree in Electrical Engineering (MSEE) with entrylevel electronic design experience. Core Knowledge, Skills, and Abilities * Strong logical thinking and rapid learning ability, with a ...

Dewberry

Entry Level Electrical Engineer

Manhattan, NY · On-site

$80K - $83K/yr

Dewberry is currently seeking an Entry Level Electrical Engineer for our NYC office ... Duties will include building information modeling (BIM) and AutoCad drafting, design, drawing ...

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Entry Level Asic Design Engineer information

See Paramus, NJ salary details

$95.1K

$152K

$204.4K

How much do entry level asic design engineer jobs pay per year?

As of Aug 12, 2026, the average yearly pay for entry level asic design engineer in Paramus, NJ is $151,986.00, according to ZipRecruiter salary data. Most workers in this role earn between $133,100.00 and $182,100.00 per year, depending on experience, location, and employer.

What is an entry level ASIC design engineer?

An Entry Level ASIC Design Engineer is responsible for assisting in the design, development, and testing of Application-Specific Integrated Circuits (ASICs). They work with senior engineers to define specifications, write hardware descriptions using languages like Verilog or VHDL, and perform simulations to validate designs. They may also collaborate with verification teams, support synthesis and timing analysis, and help troubleshoot design issues. This role requires a strong foundation in digital logic design, semiconductor fundamentals, and hardware design methodologies.

What are the typical daily responsibilities for an entry level ASIC design engineer?

As an Entry Level ASIC Design Engineer, your daily tasks often include writing and debugging code in hardware description languages, running simulations to verify functionality, and collaborating with senior engineers to implement and optimize chip designs. You may also assist with testbench development, participate in design reviews, and document your progress for project tracking. Expect to work closely with a multidisciplinary team—including verification, layout, and software engineers—to ensure the final product meets performance and reliability standards. This collaborative, fast-paced environment provides valuable hands-on experience and growth opportunities for engineers early in their careers.

What are the key skills and qualifications needed to thrive in the entry level ASIC design engineer position, and why are they important?

To thrive as an Entry Level ASIC Design Engineer, you need a solid understanding of digital logic design, hardware description languages (such as Verilog or VHDL), and a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools like Synopsys or Cadence and experience with simulation and verification environments are commonly expected. Strong problem-solving skills, effective communication, and the ability to work collaboratively make candidates stand out. These competencies enable precise design, successful project collaboration, and adaptation to the fast-paced, detail-oriented nature of ASIC development.

What are popular job titles related to Entry Level Asic Design Engineer jobs in Paramus, NJ? For Entry Level Asic Design Engineer jobs in Paramus, NJ, the most frequently searched job titles are:
What job categories do people searching Entry Level Asic Design Engineer jobs in Paramus, NJ look for? The top searched job categories for Entry Level Asic Design Engineer jobs in Paramus, NJ are:
What cities near Paramus, NJ are hiring for Entry Level Asic Design Engineer jobs? Cities near Paramus, NJ with the most Entry Level Asic Design Engineer job openings:
Entry Level Asic Design Engineer jobs near you
Infographic showing various Entry Level Asic Design Engineer job openings in Paramus, NJ as of August 2026, with employment types broken down into 58% Full Time, and 42% Contract. Highlights an 100% In-person job distribution, with an average salary of $151,986 per year, or $73.1 per hour.

THW Client Co-op

Ciena Corporation

New York, NY • On-site

$27 - $37.50/hr

Full-time

PTO

Re-posted 28 days ago

Job description

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We're a technology company that leads with our humanity-driving our business priorities alongside meaningful social, community, and societal impact.
The Opportunity: 4 month work term (Aug/Sept - Dec, 2026)
How You Will Contribute:
As a successful candidate, you will be working within the ASIC IP team with other design and verification engineers, performing digital ASIC design and verification of the Client sub-systems and cores.
The Client team crafts, develops, and tests the client protocol mapping IP of Ciena's industry leading Wavelogic coherent engine Chipsets. Wavelogic ASICs are widely used in Ciena products, and they are one of the main contributors to Ciena's success.
During your coop term in our team, you will learn about many aspects of the digital ASIC development such as our design and verification environment, prototype development, and development automation. You will be assigned well defined tasks that will allow you to contribute to our team and broaden your knowledge and gain experience in optical networking and digital ASIC development.
RTL design and verification of digital blocks, cores, and subsystems for ASIC products and FPGA-based validation. You will gain in-depth knowledge of many communications standards from IEEE 802.3, ITU, and OIF, as well as understanding system wide concepts.
Work as a team member that is responsible for the design and verification of complex digital blocks and subsystems
Implement and verify digital designs using System Verilog/UVM
The Must Haves:
- Good academic standing in a Bachelor's degree program in Electrical Engineering or Computer Engineering
- Previous experience with ASIC or FPGA development, as well as knowledge of and experience using System Verilog, Verilog, VHDL and Python
- Strong verbal and technical writing skills
- Self-motivated, and the ability to work independently as well as in a team environment
Assets:
- Knowledge of OTN, Ethernet, and other Optical Networking standards
- Strong problem solving and debugging skills
- Experience working in a Linux environment
Pay Range:
The hourly pay range for this position is $27.00 - $37.50
Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.
In addition to competitive compensation, Ciena offers students access to the Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation pay as required by applicable laws.
At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.
Ciena is an Equal Opportunity Employer, including disability and protected veteran status.
If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.

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