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Emulation Engineer Jobs in Arizona (NOW HIRING)

Tiberius Aerospace Inc.

GNC Embedded Engineer

Tucson, AZ · On-site

$150 - $200/hr

Senior GNC Software Engineer * Location: Hybrid, Tucson, Arizona (on-site for HIL activities ... actuator emulation, and avionics bus interfaces. * Apply and enforce flight software coding ...

Tiberius Aerospace Inc.

GNC Embedded Engineer

Tucson, AZ

$155K - $200K/yr

Senior GNC Embedded and HIL Engineer GNC Software Engineer | Embedded Flight Software | SIL / HIL ... emulation, and avionics bus interfaces. Apply and enforce flight software coding standards and ...

Tiberius Aerospace Inc.

GNC Embedded Engineer

Tucson, AZ · On-site

$155K - $200K/yr

Senior GNC Embedded and HIL Engineer GNC Software Engineer | Embedded Flight Software | SIL / HIL ... emulation, and avionics bus interfaces. Apply and enforce flight software coding standards and ...

Cirrus Logic

Design Verification Engineer

Chandler, AZ · On-site

$133K - $163K/yr

For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal ... Hardware emulation or acceleration * Software-driven verification * Demonstrated ability to ...

AVTC Group

FPGA Engineer

Tucson, AZ · On-site

$122K - $157K/yr

FPGA Engineer Develop FPGA designs including: Xilinx, Altera,and Microsemi. Designs are implemented ... emulation platforms, such as Veloce #CJ

Belcan

FGPA Engineer

Tucson, AZ · On-site

$112.24/hr

FPGA Engineer Location: Tucson, AZ Zip Code: 85756 Duration: 12 Months Pay Rate: $112.24/hr. Start ... Verification utilizing emulation platforms, such as Veloce  Belcan is an equal opportunity ...

AVTC Group

Principal FPGA Engineer (DOD cleared)

Tucson, AZ · On-site

$122K - $157K/yr

Secret clearance or higher required prior to start Role Summary Seeking an FPGA Engineer to support ... Experience with emulation platforms such as Veloce. * Strong technical documentation and review ...

AVTC Group

Senior FPGA Engineer (DOD cleared)

Tucson, AZ · On-site

$122K - $157K/yr

Work with circuit card designers and systems engineers to define interfaces and design requirements ... Experience with emulation platforms such as Veloce. * Strong technical documentation and review ...

Viasat, Inc.

Embedded Software Engineer

Tempe, AZ

$174K - $261K/yr

What you'll do This is a role for a Embedded Software Engineer who is eager to contribute to a ... Emulation Environments * Networking protocols (e.g. IPSec, MACsec, TLS, etc.) * Python development

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Emulation Engineer information

See Arizona salary details

$36.3K

$94.8K

$128.1K

How much do emulation engineer jobs pay per year?

As of Sep 7, 2026, the average yearly pay for emulation engineer in Arizona is $94,822.00, according to ZipRecruiter salary data. Most workers in this role earn between $78,300.00 and $108,600.00 per year, depending on experience, location, and employer.

What does an emulation engineer do?

An Emulation Engineer specializes in developing and utilizing hardware emulation platforms to validate and verify complex semiconductor designs before fabrication. They create test environments, debug hardware-software interactions, and optimize performance using FPGA-based or commercial emulation systems. Their work helps detect design flaws early, reducing development time and costs. Emulation Engineers collaborate with verification, design, and software teams to ensure system functionality aligns with specifications.

What are the key skills and qualifications needed to thrive as an emulation engineer?

To excel as an Emulation Engineer, you need a strong background in computer engineering or electrical engineering, with expertise in hardware description languages (HDL) such as Verilog or VHDL, and a deep understanding of verification methodologies. Familiarity with emulation platforms like Cadence Palladium or Mentor Graphics Veloce, simulation tools, and scripting languages such as Python or Perl is highly valued, along with relevant certifications being a plus. Excellent problem-solving skills, attention to detail, and clear communication are important soft skills, especially when working in cross-functional teams. These abilities enable Emulation Engineers to efficiently debug complex systems, develop reliable models, and collaborate effectively to accelerate silicon development cycles.

What does a typical day look like for an emulation engineer?

A typical day for an Emulation Engineer involves setting up and maintaining emulation environments, debugging hardware and software integration issues, and collaborating with design and verification teams to run complex validation scenarios. You may spend time writing and modifying scripts, generating test cases, and analyzing results to ensure new silicon designs function accurately before fabrication. The role often requires proactive communication and coordination with hardware designers, software developers, and other engineering stakeholders. This dynamic environment allows you to develop specialized expertise, contribute to project milestones, and have a tangible impact on the efficiency and quality of product development.

What are popular job titles related to Emulation Engineer jobs in Arizona?

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Emulation Engineer jobs near you
Infographic showing various Emulation Engineer job openings in Arizona as of August 2026, with employment types broken down into 75% Full Time, and 25% Contract. Highlights an 100% In-person job distribution, with an average salary of $94,822 per year, or $45.6 per hour.

Design Automation Engineer - Neuromorphic Computing

Intel

Phoenix, AZ • Hybrid

$122K - $232K/yr

Full-time

Medical, Retirement, PTO

Posted 5 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

18th of 161 rated electronics manufacturers

Job description

Job Details:Job Description: 

The Opportunity
For nearly a decade, Intel's Neuromorphic Computing Lab-together with a global ecosystem of 250+ research groups-has explored architectures, algorithms, and software inspired by the brain's extraordinary efficiency, scalability, and adaptability. Our Loihi series of research chips pioneered event-driven, sparse, and massively parallel neuro-inspired processing, fueling over 100 peer-reviewed publications that validate the promise of this novel approach.
Now, we're entering an exciting new chapter: transforming these breakthroughs into real-world products that will power the coming era of physical AI systems-beyond the reach of GPUs and mainstream AI accelerators.
If you are passionate about pushing the boundaries of computing, from transistor-level innovation to software abstractions, join us. Help define the next wave of AI technology that harnesses the proven advantages of Intel's neuromorphic computing technology with the versatility demanded by modern AI workloads.
Position Overview
We are seeking an experienced design automation engineer passionate about driving innovation at the intersection between emerging semiconductor technology, physical AI and novel computing paradigms. Loihi's silicon design flow is unique in the industry combining high-performance asynchronous design methods with standard EDA tools for silicon implementation. You will help pioneer the tool flows and automation methods required to bring these novel designs from concept to silicon, developing new capabilities spanning front-end design, physical implementation, verification, and FPGA-based emulation. Candidates should be familiar with the entire silicon design lifecycle and adapt to the requirements of our custom flow. A strong software background and an openness to learning new technologies and methodologies, such as asynchronous design, is essential. Experience with the latest AI-driven automation, agentic engineering assistants, and generative AI development tools is expected and will be a key contributor to success in this role.
Responsibilities
Enhance and maintain Loihi's asynchronous EDA tool flow by implementing design automation algorithms, software tools, utilities, and regression tests.
Support RTL designers, verification engineers and physical design engineers by providing automated solutions to achieve product quality and target KPIs.
Enable early SW development by setting up a scalable framework mapping silicon designs in simulation and emulation.
Write custom scripts to manipulate synthesis and physical design tools for low power/high performance custom designs.

Qualifications:

Minimum qualifications
Bachelors and 4+ years OR Masters and 2+ years of experience in developing and deploying production quality tools, flows and methods for silicon design.
4+ years of experience in developing and maintaining the entire ASIC tool suite. E.g. synthesis, place and route, ATPG, FEV, RV, STA, LVS/DRC.
4+ years of experience with scripting languages such as Perl, TCL, Python, etc.
2+ years of experience in delivering multiple silicon tape-outs.
Preferred qualifications
Strong System-Verilog/System-C/Object Oriented Programming background.
Experience with large scale FPGA platforms like HAPS and/or emulation frameworks like ZeBu.

1+ year of experience using AI tools for setting up tool flows, debugging and improving overall productivity.

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, Phoenix, US, California, Folsom, US, California, Santa Clara, US, Texas, AustinPosting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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