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Electromigration Jobs (NOW HIRING)

Apple

RFIC Layout Engineer

Bodega Bay, CA

$42.23 - $75.14/hr

Layout review for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling. Preferred Qualifications Knowledgeable in layout techniques for device ...

Apple

RFIC Layout Engineer

Austin, TX

$29.58 - $55.90/hr

Layout review for power/ground routing, electromigration, signal path check, differential and IQ matching, and signal coupling. Diagnose sophisticated verification (DRC/LVS) and PDK issues using ...

Apple

RFIC Layout Engineer

San Francisco, CA · On-site

Solid understanding of RC delay, electromigration, and coupling.Understanding of guard rings, DNW, PN junctions, and advanced process effects such as LOD, WPE.High level proficiency in interpretation ...

Apple

Gate-level SigEM/SEB/FIT CAD Engineer

Austin, TX · On-site

We will apply your hands-on experience in electromigration (EM), static error band (SEB), failure in time (FIT), self-heating effect (SHE), and thermal analysis to develop, define, and refine the ...

Apple

RFIC Layout Engineer

Bodega Bay, CA

$42.23 - $75.14/hr

Layout review for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling. Preferred Qualifications Knowledgeable in layout techniques for device ...

Apple

RFIC Layout Engineer

San Francisco, CA · On-site

Solid understanding of RC delay, electromigration, and coupling.Understanding of guard rings, DNW, PN junctions, and advanced process effects such as LOD and WPE.High level proficiency in ...

System Canada Technologies

Physical Design Engineer

Irvine, CA · On-site

$146K - $150K/yr

... drop and electromigration - Very comfortable writing scripts in TCL and Perl to achieve higher performance and productivity through automation - Work very closely with logic designers, who are ...

Apple

Gate-level SigEM/SEB/FIT CAD Engineer

Austin, TX · On-site

We will apply your hands-on experience in electromigration (EM), static error band (SEB), failure in time (FIT), self-heating effect (SHE), and thermal analysis to develop, define, and refine the ...

Apple

RFIC Layout Engineer

Waltham, MA · On-site

$172K - $305K/yr

Layout review for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling. Minimum Qualifications * BS and 10+ years of relevant industry experience.

Apple

Gate-level SigEM/SEB/FIT CAD Engineer

Austin, TX · On-site

We will apply your hands-on experience in electromigration (EM), static error band (SEB), failure in time (FIT), self-heating effect (SHE), and thermal analysis to develop, define, and refine the ...

Apple

RFIC Layout Engineer

Bodega Bay, CA

$42.23 - $75.14/hr

Layout review for power/gnd routing, electromigration, signal path check, differential and IQ matching, and signal coupling. Preferred Qualifications Knowledgeable in layout techniques for device ...

Intel

Standard Cell Library Engineer

Folsom, CA · On-site

$122K - $232K/yr

The candidate must possess an understanding of electromigration and thermal effects on transistors and interconnect. * Strong written and verbal communication skills are required with the ability to ...

Apple

RFIC Layout Engineer

Austin, TX

$42.23 - $75.14/hr

Layout review for power/ground routing, electromigration, signal path check, differential and IQ matching, and signal coupling. Diagnose sophisticated verification (DRC/LVS) and PDK issues using ...

Apple

RFIC Layout Engineer

Austin, TX

$29.58 - $55.90/hr

Layout review for power/ground routing, electromigration, signal path check, differential and IQ matching, and signal coupling. Diagnose sophisticated verification (DRC/LVS) and PDK issues using ...

Intel

Standard Cell Library Engineer

Santa Clara, CA · On-site

$122K - $232K/yr

The candidate must possess an understanding of electromigration and thermal effects on transistors and interconnect. * Strong written and verbal communication skills are required with the ability to ...

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Electromigration information

What are the typical challenges faced by engineers working on electromigration reliability in semiconductor design?

Engineers focusing on electromigration reliability often encounter the challenge of balancing high current densities with miniaturized interconnects, as smaller geometries are more susceptible to failure. They must analyze and predict potential failure points using advanced simulation tools and collaborate closely with layout, process, and reliability teams to ensure design rules are robust. Keeping up with evolving material technologies and stringent industry standards also requires continuous learning and adaptation. Effective communication across multidisciplinary teams is essential to proactively address electromigration issues before mass production.

What are the key skills and qualifications needed to thrive as an Electromigration Engineer, and why are they important?

To thrive as an Electromigration Engineer, you need a strong background in materials science, solid-state physics, and semiconductor device engineering, typically supported by a relevant engineering degree. Familiarity with simulation tools like COMSOL Multiphysics, failure analysis equipment (such as SEM/TEM), and industry standards is essential. Analytical thinking, problem-solving, and clear communication are important soft skills for interpreting data, collaborating with teams, and presenting findings. These skills ensure the reliable design and testing of electronic components, helping prevent device failures and improve product longevity.

What is the difference between Electromigration vs Semiconductor Process Engineer?

AspectElectromigrationSemiconductor Process Engineer
Required credentialsPhysics or Electrical Engineering degree, specialized knowledge in materials scienceElectrical Engineering, Materials Science, or Chemical Engineering degree
Work environmentCleanroom, R&D labs, semiconductor fabrication facilitiesManufacturing plants, cleanrooms, R&D labs
Industry usageElectronics, semiconductor manufacturingSemiconductor industry, electronics manufacturing
Common search intentUnderstanding failure mechanisms in microelectronicsProcess optimization and manufacturing quality

Electromigration involves studying how metal atoms move within microelectronic circuits under electrical current, leading to device failure. Semiconductor Process Engineers focus on developing and optimizing manufacturing processes for semiconductor devices. While both roles operate in the semiconductor industry and require technical knowledge, Electromigration is more research-focused on material failure, whereas Semiconductor Process Engineers work on production processes.

What is electromigration and why is it important in electronics?

Electromigration is the gradual movement of metal atoms within a conductor, such as a wire or trace, caused by the flow of high-density electrical current. This phenomenon can lead to the formation of voids and hillocks in the metal, potentially causing circuit failure over time. Electromigration is especially important in microelectronics because as devices become smaller and power densities increase, the risk of failure due to electromigration also rises. Understanding and preventing electromigration is crucial for ensuring the reliability and longevity of integrated circuits and electronic devices.
Infographic showing various Electromigration job openings in the United States as of May 2026, with employment types broken down into 100% Full Time. Highlights an 75% In-person, and 25% Hybrid job distribution.
Failure Analysis Engineer, Microelectronics (Starlink)

Failure Analysis Engineer, Microelectronics (Starlink)

SpaceX

Bastrop, TX • On-site

Other

Posted 26 days ago

SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 143 frontline employees who took The Breakroom Quiz

13th of 59 rated aerospace companies

Job description

FAILURE ANALYSIS ENGINEER, MICROELECTRONICS (STARLINK)

Starlink is SpaceX's ambitious goal to bring high-quality internet to the globe by building a constellation of thousands of satellites in low Earth orbit (LEO) using our Falcon 9 and Starship reusable rockets. We are developing millions of devices for end users to link our customers to our satellites.

As a Failure Analysis Engineer on the Starlink team, you will perform detailed root cause failure analysis on microelectronic components and packaging to support high-volume manufacturing, qualification, and field returns. You will leverage advanced laboratory tools and physics-of-failure techniques to identify failure mechanisms and drive corrective actions that improve the reliability of our satellite constellation and user terminals.

RESPONSIBILITIES:

  • Own end-to-end root cause failure analysis investigations on microelectronics failing in manufacturing, test, and field, from initial failure characterization through final corrective action verification
  • Conduct advanced electrical fault isolation and characterization using curve trace, TDR, RF characterization, Lock-in Thermography, OBIRCH, EBIRCH, EBAC, nanoprobing, and related techniques to precisely localize defects in complex devices
  • Perform advanced physical failure analysis using SEM, FIB, EDS, SAM, cross-sectioning, and related techniques to identify failure mechanisms in silicon, packaging, and interconnects
  • Apply physics-of-failure principles and deep knowledge of semiconductor failure modes (electromigration, thermal fatigue, delamination, EOS/ESD, solder joint fatigue, etc.) to determine root causes
  • Drive corrective actions by working directly with silicon design, packaging, and manufacturing teams to implement and validate design or process changes based on FA findings
  • Author detailed technical reports documenting failure modes, root cause conclusions, supporting data, and corrective action effectiveness
  • Develop and improve failure analysis techniques and workflows to support new packaging technologies and advanced materials

BASIC QUALIFICATIONS:

  • Bachelor's degree in materials science, electrical engineering, physics, chemical engineering, or other STEM discipline 
  • 2+ years of hands-on experience in microelectronics failure analysis or materials characterization (internship experience is applicable)

PREFERRED SKILLS AND EXPERIENCE:

  • Master's or PhD in materials science, electrical engineering, physics, chemical engineering, or other STEM discipline with a focus on microelectronics or failure analysis
  • Direct experience with failure analysis tools and techniques (SEM, FIB, EDS, cross-sectioning, fault isolation, or equivalent)
  • Strong understanding of semiconductor physics and common microelectronics failure mechanisms (electromigration, thermal fatigue, delamination, solder joint fatigue, electrical overstress/ESD, etc.)
  • Proficiency with advanced FA tools including SEM, FIB, SAM, and EDS
  • Hands-on experience in electrical characterization and fault isolation techniques such as IV curves, RF/VNA measurement, LIT, OBIRCH, EBIRCH, EBAC, nanoprobing, photon emission, or voltage contrast
  • Experience applying JEDEC and AEC reliability test standards and physics-of-failure methodologies to root cause investigations
  • Experience analyzing complex datasets with Python, JMP, or similar tools
  • Excellent problem-solving, communication, and technical writing skills

ADDITIONAL REQUIREMENTS:

  • Ability to work overtime and weekends as needed
  • Ability to work in a cleanroom or ESD-controlled environment when required

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