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Eda Manager Jobs in Matawan, NJ (NOW HIRING)

The EDA Big Data platform supports Hadoop and Aster technology in a multi-tenant environment ... management (tracking of sources in the big data environment), system documentation, metadata ...

AI Engineer

New York, NY · On-site

$200K - $400K/yr

Design strategies to manage latency, output variance, and graceful error handling at scale ... Experience with hardware design, hardware verification, or EDA tooling * Experience deploying AI ...

Cultivate and manage strategic alliances in North America with EDA vendors (e.g. Synopsys, Cadence, Siemens EDA), foundries (e.g. TSMC, Samsung, GlobalFoundries), IP licensing partners, and system ...

Cultivate and manage strategic alliances in North America with EDA vendors (e.g. Synopsys, Cadence, Siemens EDA), foundries (e.g. TSMC, Samsung, GlobalFoundries), IP licensing partners, and system ...

Software Engineer, Backend

New York, NY · On-site

$200K - $400K/yr

... managing projects and reviewing results, and backend services that coordinate long-running work ... Semiconductors, EDA, or hardware engineering workflows Equal Employment Opportunity Statement ...

PIC Design Engineer

Matawan, NJ · On-site

$170K - $290K/yr

... DRC verifications. -Manage R&D and production PIC tape-outs. -Work with foundry partners to ... KLayout or similar). -Experience with Lumerical, Cadence Vituoso, or similar EDA tools ...

Senior Software Engineer: Integrations

New York, NY · Remote

$125K - $165K/yr

Manage cloud deployments across AWS, Azure, GCP, and OpenShift: standing them up, keeping them ... Experience in EDA, semiconductor, or hardware-adjacent software environments Our AI Bullshit Meter ...

PIC Design Engineer

Matawan, NJ · On-site

$170K - $290K/yr

... DRC verifications. -Manage R&D and production PIC tape-outs. -Work with foundry partners to ... KLayout or similar). -Experience with Lumerical, Cadence Vituoso, or similar EDA tools ...

Senior Software Engineer: Deployments

New York, NY · On-site

$134K - $176K/yr

Manage cloud deployments across AWS, Azure, GCP, and OpenShift: standing them up, keeping them ... Experience in EDA, semiconductor, or hardware-adjacent software environments Our AI Bullshit Meter ...

Senior Forward Deployed Engineer (FDE)

New York, NY · Remote

$107K - $146K/yr

Manage cloud deployments across AWS, Azure, GCP, and OpenShift: standing them up, keeping them ... Experience in EDA, semiconductor, or hardware-adjacent software environments Our AI Bullshit Meter ...

PIC Design Engineer

Matawan, NJ · On-site

$170K - $290K/yr

... DRC verifications. -Manage R&D and production PIC tape-outs. -Work with foundry partners to ... KLayout or similar). -Experience with Lumerical, Cadence Vituoso, or similar EDA tools ...

Senior Software Engineer: Solutions

New York, NY · Remote

$125K - $165K/yr

Manage cloud deployments across AWS, Azure, GCP, and OpenShift: standing them up, keeping them ... Experience in EDA, semiconductor, or hardware-adjacent software environments Our AI Bullshit Meter ...

Senior Software Engineer: Deployments

New York, NY · Remote

$125K - $165K/yr

Manage cloud deployments across AWS, Azure, GCP, and OpenShift: standing them up, keeping them ... Experience in EDA, semiconductor, or hardware-adjacent software environments Our AI Bullshit Meter ...

Senior Software Engineer: Solutions

New York, NY · On-site

$134K - $176K/yr

Manage cloud deployments across AWS, Azure, GCP, and OpenShift: standing them up, keeping them ... Experience in EDA, semiconductor, or hardware-adjacent software environments Our AI Bullshit Meter ...

Forward Deployed Engineer

New York, NY · On-site

$62.25 - $82.75/hr

Manage cloud deployments across AWS, Azure, GCP, and OpenShift: standing them up, keeping them ... Experience in EDA, semiconductor, or hardware-adjacent software environments Our AI Bullshit Meter ...

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Eda Manager information

What is an EDA manager?

EDA Managers are professionals who oversee Electronic Design Automation (EDA) projects within semiconductor or electronics companies. Their primary responsibilities include managing teams that use specialized software tools to design, verify, and test integrated circuits (ICs) and other electronic systems. EDA Managers coordinate between engineering, software, and hardware teams to ensure project deadlines are met and quality standards are maintained. They also keep up-to-date with the latest EDA tools and methodologies to enhance productivity and optimize design flows.

What are the key skills and qualifications needed to thrive as an EDA manager, and why are they important?

To thrive as an EDA Manager, you need strong expertise in electronic design automation (EDA) methodologies, semiconductor design processes, and a relevant engineering degree. Familiarity with EDA tools such as Cadence, Synopsys, and Mentor Graphics, as well as project management certifications, is often required. Excellent leadership, problem-solving, and communication skills help manage teams and coordinate complex projects. These qualifications ensure efficient workflow, high-quality chip design, and successful project delivery in the fast-paced semiconductor industry.

What are the main challenges an EDA manager faces when overseeing cross-functional design teams?

An EDA Manager often encounters challenges in aligning the goals and timelines of diverse engineering teams, such as digital, analog, and verification groups, who rely on different EDA tools and methodologies. Ensuring smooth integration of workflows, maintaining up-to-date tool expertise, and resolving toolchain compatibility issues are key aspects of the role. Additionally, EDA Managers must balance project deadlines with the need for continuous process improvement, often acting as a bridge between technical teams and upper management to communicate progress and resource needs effectively.

What is the difference between Eda Manager vs Eda Engineer?

AspectEda ManagerEda Engineer
CredentialsBachelor's or Master's in Electrical Engineering, Project Management certificationsBachelor's or Master's in Electrical Engineering, relevant technical certifications
Work EnvironmentOversees teams, manages projects, coordinates with clientsDesigns and tests electrical systems, performs simulations
Industry UsageUsed in project planning, team leadership, and client communicationUsed in circuit design, simulation, and technical analysis

The main difference between an Eda Manager and an Eda Engineer lies in their roles. The Eda Manager oversees projects and teams, focusing on management and coordination, while the Eda Engineer handles technical design and analysis. Both roles require electrical engineering credentials, but their responsibilities and daily tasks differ significantly.

What job categories do people searching Eda Manager jobs in Matawan, NJ look for?

The top searched job categories for Eda Manager jobs in Matawan, NJ are:

Quantum Cryo CMOS Design Enablement

New York, NY • On-site


GlobalFoundries
Manufacturing • 10K+ employees

8.3

Company rating: 8.3 out of 10

Based on 35 frontline employees who took The Breakroom Quiz

66th of 544 rated manufacturers

People enjoy working here

Good employer

Recommended by students


$98K - $176K/yr

Full-time

Re-posted 8 days ago


Job description

Quantum Cryo CMOS Design Enablement, Member of Technical Staff
About GlobalFoundries
GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world's most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com.
Introduction
The Quantum Cryo CMOS Design Enablement (MTS) role is a technical contributor within the Quantum Technology Solutions organization, reporting to the Sr. Manager / Deputy Director of Cryo CMOS Design Enablement. This position supports the development of cryogenic CMOS design enablement capabilities to enable quantum and cryogenic technologies, focusing on translating device and process innovations into usable Process Design Kits (PDKs) and design flows. The role bridges semiconductor device physics, modeling, characterization, and EDA environments to support scalable, manufacturable, and customer-usable cryogenic design solutions.
Job Summary
As a Member of Technical Staff, this role contributes to the development and execution of cryogenic CMOS PDK and design enablement solutions, including modeling, characterization, test chip development, and EDA integration. The engineer will work cross-functionally with device engineering, process development, and design enablement teams to ensure accurate, validated, and usable design collateral for quantum and cryogenic applications, while supporting customer and internal program requirements through data-driven analysis and hands-on technical execution.
Essential Responsibilities
  • Contribute to development of cryogenic CMOS PDKs, including compact models, parameter extraction, and validation across temperature regimes.
  • Support device modeling efforts by correlating silicon data, simulations, and model behavior to ensure predictive accuracy.
  • Develop and execute electrical characterization plans for cryogenic CMOS devices and circuits.
  • Design and implement test structures and test sites to support model extraction and validation.
  • Contribute to test chip design and evaluation to enable continuous improvement of PDK capabilities.
  • Analyze characterization and test data to identify trends, variability, and opportunities for model and design rule improvements.
  • Support development and deployment of design flows, model integration, and PDK deliverables within EDA environments.
  • Collaborate with EDA vendors to enable modeling, simulation, and design capabilities for cryogenic and quantum applications.
  • Work cross-functionally with device, process, integration, and design enablement teams to translate technology into usable design collateral.
  • Document methodologies, assumptions, and results to support scalable design enablement and knowledge transfer.

Required Qualifications
  • Education: BS or MS in Electrical Engineering, Physics, Applied Physics, or related field
  • Years of Experience: 5+
  • Experience with device modeling, characterization, or test structures
  • Familiarity with electrical characterization techniques and data analysis
  • Experience working with EDA tools and semiconductor design flows
  • Strong analytical, problem solving, and communication skills

Preferred Qualifications
  • Experience with cryogenic electronics or low-temperature device behavior
  • Exposure to PDK development or compact model implementation
  • Experience designing test chips or supporting silicon validation activities
  • Familiarity with variability modeling or statistical data analysis
  • Experience working with EDA vendors
  • Exposure to quantum computing hardware

Expected Salary Range
$98,000.00 - $176,000.00
The exact Salary will be determined based on qualifications, experience and location.
If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address.
An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations.
GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory.
All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law


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