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Eda Design Jobs in Arizona (NOW HIRING)

Intel

Memory Circuit Design Engineer

Phoenix, AZ

Knowledge of EDA tools used for custom digital and memory circuit design. Preferred Qualifications: * PhD with 1-2 years of professional experience gained through either internships or full-time ...

AVTC Group

Digital Design Engineer

Tucson, AZ · On-site

$128K/yr

... EDA)tools: DxDesigner, xDX Designer VX and Xilinx (Zynq Ultrascale, Vivado, Atrix) • Experience using PCB electronic circuit design software: HyperLynx signal integrity, power integrity, and analog ...

Intel

Silicon Packaging Design Engineer

Phoenix, AZ

$135K/yr

Proficiency in custom layout and Auto-place-and-route EDA tools including Virtuoso, Innovus, FusionCompiler, ICvalidator, and/or Calibre. * Experience with silicon physical layout design and ...

MKS2 Technologies

Digital Design Engineer

Tucson, AZ · On-site

$90K - $100K/yr

Digital Design Engineer - Secret Clearance Required Location: Tucson, AZ (On-site) Job Type: W-2 ... Mentor Graphics / Siemens EDA (DxDesigner, xDX Designer VX) * Xilinx tools (Vivado, Zynq Ultrascale ...

ADP, Inc.

Principal Engineer, CAD

Tempe, AZ · On-site

$161 - $230/hr

The Principal CAD Engineer will also interface with EDA Tool Vendors and have responsibilities for implementation and performance testing of new software releases, prior to deploying to IC Designers ...

Posted today

Intel Corporation

EDA Tools Software Engineer

Phoenix, AZ · On-site

$149K - $284K/yr

Designs, develops, tests, and debugs software tools, flows, and methodologies used in design ... related EDA tools. * Experience in Industry-standard Reliability Verification, Extraction and ...

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Eda Design information

What is EDA design?

EDA design refers to Electronic Design Automation, which involves using specialized software tools to design, analyze, and verify electronic systems such as integrated circuits (ICs) and printed circuit boards (PCBs). EDA designers use these tools to create complex chip architectures, optimize layouts, and ensure that designs meet performance and reliability standards. The EDA process streamlines development, reduces errors, and accelerates time-to-market for electronic products. Professionals in this field often work closely with hardware engineers and manufacturers.

What are some common challenges EDA design engineers face when working on complex chip projects?

EDA (Electronic Design Automation) Design engineers frequently encounter challenges such as managing large-scale circuit complexity, ensuring design accuracy under tight deadlines, and integrating new technologies into existing workflows. Collaboration is often required with cross-functional teams, including verification, layout, and software engineers, to resolve design bottlenecks and meet project specifications. Staying updated with evolving EDA tools and methodologies is also crucial for maintaining productivity and ensuring high-quality deliverables.

What are the key skills and qualifications needed to thrive as an EDA design engineer, and why are they important?

To thrive as an EDA Designer, you need a strong background in electrical engineering, digital/analog circuit design, and experience with ASIC/FPGA development, often supported by a degree in electrical or computer engineering. Proficiency in EDA tools such as Cadence, Synopsys, Mentor Graphics, and familiarity with hardware description languages like VHDL or Verilog are typically required. Attention to detail, problem-solving ability, and effective communication help EDA Designers excel in cross-functional engineering teams. These skills and qualities ensure efficient, accurate, and innovative electronic design solutions that meet complex technical and project requirements.

What is the difference between Eda Design vs PCB Designer?

AspectEda DesignPCB Designer
CredentialsTypically requires a degree in electrical engineering or related fieldRequires similar electrical engineering background, often with certifications in PCB design
Work EnvironmentDesigning electronic schematics and layouts, often using CAD toolsFocusing on creating detailed PCB layouts and ensuring manufacturability
Industry UsageUsed across electronics, consumer devices, and industrial equipmentPrimarily in electronics manufacturing and product development

While both roles involve electronic design, Eda Design encompasses the broader process of creating electronic schematics and systems, whereas PCB Designer specializes in laying out printed circuit boards. The roles often overlap, but Eda Design is more comprehensive, including system-level design, while PCB Designer focuses on the physical layout of circuit boards.

What does an EDA design engineer do?

An EDA (Electronic Design Automation) design engineer develops and tests electronic circuit designs using specialized software tools. They create schematics, perform simulations, and optimize layouts to ensure functionality and manufacturability of electronic systems, often working closely with hardware and software teams. Proficiency in EDA tools like Cadence or Synopsys and knowledge of digital and analog circuit design are essential for this role.

What job categories do people searching Eda Design jobs in Arizona look for?

The top searched job categories for Eda Design jobs in Arizona are:

What cities in Arizona are hiring for Eda Design jobs?

Cities in Arizona with the most Eda Design job openings:

Eda Design jobs near you
Infographic showing various Eda Design job openings in Arizona as of August 2026, with employment types broken down into 89% Full Time, 8% Part Time, and 3% Contract. Highlights an 80% Physical, 6% Hybrid, and 14% Remote job distribution.

Memory Circuit Design Engineer

Intel

Phoenix, AZ

Full-time

Medical, Retirement, PTO

Re-posted 12 days ago

Key responsibilities

  • Develop and optimize memory circuits, including pathfinding activities and PPA improvements through design technology co-optimization.

  • Design, layout, and automate memory bit-cell and complex periphery ICs, as well as memory array/IP design and test-chip development.

  • Perform pre-Si verification, post-Si validation, and debugging to enable yield and parametric tracking/ramp.

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

18th of 161 rated electronics manufacturers

Job description

Job Details:Job Description: 

The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.

The Advanced Design (AD) team is part of Intel's larger Design Technology Platform (DTP) Organization and is focused on pathfinding and development of advanced memory technology. These circuits enable best-in-class memory collateral, IP and innovative product design across all generations of Intel process technology. At Intel, DTP is one of the key pillars enabling Intel to deliver winning products in the marketplace. Your work will directly enable Intel's internal and external customers to get to the market faster with products that include high-performance, high-density, low-power memory at the leading edge of the technology curve and implemented in Intel's advanced CMOS process technologies.

You will be partnering with and leveraging domain experts across various areas of technology development, EDA vendors and product design teams to develop and deliver high-quality industry-leading memory technology collaterals and to drive circuit innovations that enable next generation high-performance, high-density, low-power embedded memory designs on Intel advanced CMOS process technologies. In this position your responsibilities will include, but may not be limited to:

  • Memory pathfinding activities and power, performance and area (PPA) optimization through design technology co-optimization (DTCO) and product design enablement.
  • Memory bit-cell and complex periphery IC layout and automation.
  • Memory array/IP design, memory circuit innovation, test-chip design.
  • Pre-Si verification, post-Si validation and debugging to enable yield and parametric tracking/ramp.
Qualifications:

You must possess the minimum qualifications listed below to interview for this position. Preferred qualifications are not required but may work to your advantage during the interview process.
Minimum Qualifications:
Master degree in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related discipline, including 4+ years of professional experience gained through either internships or full-time employment Or a PhD in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related discipline.
Technical Experience:

  • Design, characterization, and verification of custom memory circuits such as SRAM, Register Files or ROM.
  • Design trade-offs between power, performance, and area (PPA).
  • Custom digital circuit design, simulation, layout design, and verification.
  • Knowledge of EDA tools used for custom digital and memory circuit design.

Preferred Qualifications:

  • PhD with 1-2 years of professional experience gained through either internships or full-time employment.
  • Design technology co-optimization (DTCO).
  • Post-Si validation experience.
  • Knowledge of the CMOS ASIC design flow.
Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, Arizona, Phoenix, US, California, Santa Clara, US, Texas, AustinBusiness group:Intel Foundry strives to make every facet of semiconductor manufacturing state-of-the-art while delighting our customers -- from delivering cutting-edge silicon process and packaging technology leadership for the AI era, enabling our customers to design leadership products, global manufacturing scale and supply chain, through the continuous yield improvements to advanced packaging all the way to final test and assembly. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments. Employees in the Foundry Technology Manufacturing are part of a worldwide factory network that designs, develops, manufactures, and assembly/test packages the compute devices to improve the lives of every person on Earth.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

What Intel employees say

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Benefits

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Workplace

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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