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Dram Design Engineer Jobs in Boise, ID (NOW HIRING)

As a Staff DRAM Design Engineer, you'll play a critical role in shaping memory architectures and circuit innovations that directly impact product performance, power, and reliability. This is a hands ...

As an Intern DRAM Design Engineer, you will contribute to the design, analysis, verification, and optimization of digital, analog, and mixed-signal circuits used in next-generation memory products.

As a Staff DRAM Design Engineer, you'll play a critical role in shaping memory architectures and circuit innovations that directly impact product performance, power, and reliability. This is a hands ...

As a DRAM Verification Engineering Intern, you will collaborate with global design and verification teams to ensure the quality and functionality of future DRAM products. You will gain hands-on ...

Exposure to memory design (DRAM, NAND, SRAM) or high-speed circuit design * Experience with layout tools and physical design methodologies * Knowledge of scripting or programming (e.g., Python, TCL ...

Exposure to memory design (DRAM, NAND, SRAM) or high-speed circuit design * Experience with layout tools and physical design methodologies * Knowledge of scripting or programming (e.g., Python, TCL ...

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Dram Design Engineer information

See Boise, ID salary details

$38.5K

$83.9K

$150.9K

How much do dram design engineer jobs pay per year?

As of Aug 26, 2026, the average yearly pay for dram design engineer in Boise, ID is $83,897.00, according to ZipRecruiter salary data. Most workers in this role earn between $64,700.00 and $93,700.00 per year, depending on experience, location, and employer.

What does a DRAM design engineer do?

A DRAM Design Engineer is responsible for designing and developing Dynamic Random Access Memory (DRAM) chips used in computers, mobile devices, and other electronic products. Their work includes creating circuit layouts, optimizing memory performance, and ensuring power efficiency and reliability. They collaborate with cross-functional teams, run simulations, and support the manufacturing process to ensure the final products meet industry standards.

What are some common challenges a DRAM design engineer faces during the memory development cycle?

DRAM Design Engineers often encounter challenges related to optimizing speed, power consumption, and reliability while adhering to strict specifications. Balancing these competing requirements can be complex, especially as process nodes shrink and memory densities increase. Additionally, ensuring signal integrity and minimizing noise in high-speed circuits requires close collaboration with layout, verification, and product engineering teams. Staying up to date with evolving industry standards and debugging unexpected issues during silicon validation are also key aspects of the role.

What are the key skills and qualifications needed to thrive as a DRAM design engineer, and why are they important?

To thrive as a DRAM Design Engineer, you need a solid background in electrical engineering, digital circuit design, and semiconductor physics, usually supported by a relevant engineering degree. Proficiency with hardware description languages (such as Verilog or VHDL), CAD tools, and simulation software is essential, along with familiarity with industry standards like JEDEC. Strong analytical thinking, attention to detail, and effective teamwork set top performers apart in this role. These skills ensure the development of reliable, high-performance memory products that meet stringent industry specifications and market demands.

What job categories do people searching Dram Design Engineer jobs in Boise, ID look for?

The top searched job categories for Dram Design Engineer jobs in Boise, ID are:

Infographic showing various Dram Design Engineer job openings in Boise, ID as of August 2026, with employment types broken down into 87% Full Time, 9% Part Time, and 4% Contract. Highlights an 86% Physical, 4% Hybrid, and 10% Remote job distribution, with an average salary of $83,897 per year, or $40.3 per hour.

Staff DRAM Design Engineer

Boise, ID • On-site

$90 - $110/hr

Other

Medical, Dental, Vision, PTO

Posted 15 days ago


Job description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We’re building the next generation of DRAM technology and pushing what’s possible at the intersection of device physics and circuit design. Our team thrives on solving deep technical challenges and turning innovative ideas into high‑performance, manufacturable memory solutions. If you’re excited about influencing future technology nodes and working on designs that ship at scale, you’ll feel right at home with us! As a Principal DRAM Design Engineer, you’ll play a critical role in shaping memory architectures and circuit innovations that directly impact product performance, power, and reliability. This is a hands‑on design role where your expertise will drive key decisions from concept through silicon validation, while collaborating with cross‑functional teams to deliver meaningful results.

Responsibilities
  • Lead design and optimization of DRAM circuits including memory array, control logic, datapath, and test logic.
  • Perform and analyze circuit simulations using tools such as SPICE and Verilog.
  • Evaluate architectural trade‑offs impacting power, performance, and die size.
  • Integrate layout parasitics into simulations and drive design for manufacturability.
  • Define validation strategies including test chip development and silicon bring‑up.
Minimum Qualifications
  • Bachelor’s degree in Electrical Engineering or related field.
  • 2+ years of circuit design experience or 4+ years of product engineering experience.
  • Strong understanding of analog and digital circuit fundamentals and debugging.
  • Experience with circuit simulation tools and methodologies.
  • Knowledge of CMOS behavior, timing, and performance optimization.
Preferred Qualifications
  • Experience with memory architectures, especially DRAM array design and sense amplifiers.
  • Familiarity with DFT/DFM concepts and semiconductor test flows.
  • Experience working with layout parasitics and advanced process nodes.
  • Ability to communicate complex technical concepts clearly across teams.
  • Interest or experience in applying AI tools to engineering workflows.
Benefits
  • Choice of medical, dental and vision plans across all locations.
  • Benefit programs that protect income if unable to work due to illness or injury.
  • Paid family leave, robust paid time‑off program and paid holidays.
  • Additional benefits available through Micron Benefits Guide.
Equal Opportunity

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.

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