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Director Emulation Engineer Jobs in Medfield, MA

Nutanix

Graphics Software Engineer, Staff

Boxborough, MA · On-site

$142 - $212/hr

... Director and above) .Principal Duties and Responsibilities: • Leverages advanced Graphics ... g., simulation, emulation, on-device) to ensure optimal performance, stability, security, and ...

Apple Inc.

PHY Design Verification Engineer

Waltham, MA · On-site

$184.70 - $324.80/hr

... integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering ... Develop and execute both directed and constrained random tests, debug failures, manage bug tracking ...

Flex Ltd.

Sr. Thermal Systems Engineer

Littleton, MA · On-site

$126K - $173K/yr

... of direct-to-chip (D2C) cooling systems used to cool high-TDP CPUs/GPUs/accelerators. They will be ... Execute lab and rack-scale testing (pump curves, flow balance, ΔP mapping, heat load emulation ...

Flex

Sr. Thermal Systems Engineer

Littleton, MA · On-site

$126K - $173K/yr

... of direct-to-chip (D2C) cooling systems used to cool high-TDP CPUs/GPUs/accelerators. They will be ... Execute lab and rack-scale testing (pump curves, flow balance, P mapping, heat load emulation ...

Marvell

Director, SOC Design

Westborough, MA · On-site

... emulation, performance and power analysis and debug * Work with third party vendors to define ... Recruit, retain, and develop top engineering talent What We're Looking For * Bachelor's degree in ...

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All JobsEmulation Engineer JobsDirector Emulation Engineer JobsDirector Emulation Engineer Jobs in Medfield, MA

Director Emulation Engineer information

See Medfield, MA salary details

$61.4K

$115.2K

$209.5K

How much do director emulation engineer jobs pay per year?

As of Aug 27, 2026, the average yearly pay for director emulation engineer in Medfield, MA is $115,208.00, according to ZipRecruiter salary data. Most workers in this role earn between $83,100.00 and $136,700.00 per year, depending on experience, location, and employer.

What does a director emulation engineer do?

A Director Emulation Engineer oversees the development and implementation of hardware emulation systems used to test and validate the functionality of semiconductor designs before they are manufactured. This role involves managing a team of engineers, setting technical direction, and ensuring that emulation platforms meet project and company requirements. Responsibilities also include collaborating with design, verification, and software teams to optimize workflows and improve overall productivity. The Director Emulation Engineer plays a critical role in reducing time-to-market and ensuring design quality in the semiconductor industry.

What are the key skills and qualifications needed to thrive as a director emulation engineer?

To excel as a Director Emulation Engineer, you need deep expertise in hardware verification, emulation methodologies, and a solid background in electrical or computer engineering, often with an advanced degree. Familiarity with industry-standard tools like Cadence Palladium, Synopsys ZeBu, or Mentor Veloce, as well as experience with scripting languages and EDA workflows, is essential. Leadership, strategic thinking, and effective communication distinguish top performers by enabling them to guide teams and coordinate complex projects. These skills ensure efficient verification cycles, high-quality silicon development, and successful cross-functional collaboration in fast-paced semiconductor environments.

What are some common challenges faced by a director emulation engineer when leading emulation projects?

A Director Emulation Engineer often navigates challenges such as aligning cross-functional teams, managing resource allocation, and ensuring timely delivery of complex emulation solutions. Balancing the technical intricacies of hardware and software integration while meeting aggressive project timelines is frequently required. Additionally, keeping up with evolving emulation technologies and fostering team expertise are critical to maintaining project success and supporting innovation.

What is the difference between Director Emulation Engineer vs Senior Emulation Engineer?

AspectDirector Emulation EngineerSenior Emulation Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer Science, possibly with leadership experienceBachelor's/Master's in Electrical Engineering or Computer Science, with extensive emulation experience
Work EnvironmentLeads teams, manages projects, collaborates with multiple departmentsPerforms hands-on emulation design, testing, and optimization
Industry UsageUsed in semiconductor, electronics, and chip design companiesCommonly found in semiconductor and hardware development firms

The main difference is that a Director Emulation Engineer oversees teams and projects, focusing on strategic leadership, while a Senior Emulation Engineer primarily handles technical tasks and hands-on emulation work. Both roles require strong technical skills, but the director position emphasizes management and coordination.

What cities near Medfield, MA are hiring for Director Emulation Engineer jobs?

Cities near Medfield, MA with the most Director Emulation Engineer job openings:

Director Emulation Engineer jobs near you
Infographic showing various Director Emulation Engineer job openings in Medfield, MA as of June 2026, with employment types broken down into 81% Full Time, 17% Part Time, and 2% Contract. Highlights an 90% Physical, 5% Hybrid, and 5% Remote job distribution, with an average salary of $115,208 per year, or $55.4 per hour.

Scientific Software Engineer - Virtual Machine & Emulation

QuEra Computing, Inc.

Boston, MA

$102K - $166K/yr

Full-time

Re-posted 20 days ago

Job description

Summary

QuEra Computing Inc. seeks a creative and collaborative Scientific Software Engineer to help solve the unique software challenges of integrating high-level applications into state-of-the-art neutral-atom quantum computers. You will have the opportunity to work with a vibrant scientific software team and a community of industry and academic collaborators and to help our growing team of diverse experts address fascinating challenges, ranging from classical compiler techniques to direct integration with low-level hardware components.

Directly interacting with our compiler toolchain Kirin, you will be building QuEra's multi-level hardware simulation tools across compiler pipeline together with experimental & computational physicists. This involves the development of new features and infrastructure for simulating hardware execution. You will be co-designing compilers and hardware simulation infrastructure for the next generation of quantum computing using cutting-edge neutral-atom and quantum error correction technologies. This new direction involves multiple new challenges in both engineering and science.

Responsibilities

  • Develop and maintain a multi-level hardware virtual machine that emulates QuEra's domain-specific language (DSL) for pulse-level programs and its associated compilation stack
  • Support integration into control stack
  • Collaborate with Quantum Error Correction (QEC) scientists and hardware control team to plan and simulate hardware features required for executing QEC algorithms
  • Collaborate with other members of the scientific software team to perform gate-level and atom-move hardware simulation

Qualifications

  • Masters in Computer Science with focus on quantum computation/architecture/programming language/compiler, or equivalent professional experience
  • Enthusiastic about building tools used by non-software developers
  • Experience with bytecode interpreters, CPython interpreter
  • Experience with modern C/C++ projects and tooling around those projects
  • Experience with hardware emulation and VM development, especially for novel/heterogeneous architectures
  • Experience with Static Single Assignment intermediate representations-based compiler
  • Knowledge of the full lifecycle of software development, including version control, code review, testing, CI/CD, logging, profiling, debugging, and documentation

Preferred Qualifications

  • Ph.D. in Computer Science with focus on quantum computation/architecture/programming language/compiler, or equivalent professional experience
  • Experience with compiled languages such as Rust, C++, Julia
  • Experience with FPGA programming
  • knowledge in quantum physics and AMO physics
  • knowledge in quantum error correction
  • Contribution to existing open-source libraries

The approximate base salary range for this position is $102,400 - $166,400.

We consistently monitor external market data and update base salary ranges accordingly.  We determine base compensation decisions on several factors, including as geographic placement, role-specific knowledge, skills, and/or experience.  In addition to our base salary offerings, we also provide equity grants for all new hires.

QuEra is committed to cultivating a diverse work environment and is proud to be an equal opportunity employer. We highly value diversity in our current and future employees and do not discriminate (including in our hiring and promotion practices) based on race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.

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