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Ddr Memory Jobs in Chicago, IL (NOW HIRING)

Eliyan

Architecture - I/O Architect

Mundelein, IL

Support customer integration for compute-to-memory (CXL/DDR), processor interconnect (AXI/PCIe), and control plane (APB). Create clear and comprehensive architecture specifications with foolproof ...

Eagle Seven

Junior FPGA Engineer

Chicago, IL · On-site

... or memory interfaces (DDR) preferred * Strong foundational knowledge of SystemVerilog (or Verilog) for design and verification * Hands-on experience with ModelSim (or similar tools like Questa ...

Eagle Seven

Junior FPGA Engineer

Chicago, IL · On-site

... or memory interfaces (DDR) preferred * Strong foundational knowledge of SystemVerilog (or Verilog) for design and verification * Hands-on experience with ModelSim (or similar tools like Questa ...

Eagle Seven

Junior FPGA Engineer

Chicago, IL · On-site

... or memory interfaces (DDR) preferred * Strong foundational knowledge of SystemVerilog (or Verilog) for design and verification * Hands-on experience with ModelSim (or similar tools like Questa ...

All JobsDdr Memory JobsDdr Memory Jobs in Chicago, IL

Ddr Memory information

See Chicago, IL salary details

$131.3K

$173.6K

How much do ddr memory jobs pay per year?

As of Aug 10, 2026, the average yearly pay for ddr memory in Chicago, IL is $171,317.00, according to ZipRecruiter salary data. Most workers in this role earn between $172,000.00 and $172,000.00 per year, depending on experience, location, and employer.

What is the difference between Ddr Memory vs Computer Hardware Technician?

AspectDdr MemoryComputer Hardware Technician
Required CredentialsKnowledge of memory modules, certifications like CompTIA A+Certifications like CompTIA A+, technical training in hardware repair
Work EnvironmentManufacturing, testing, or assembly of memory modulesRepair shops, IT departments, hardware troubleshooting
Industry UsageMemory manufacturing companies, electronics industryIT services, computer repair, technical support

While Ddr Memory involves the manufacturing and testing of memory modules, a Computer Hardware Technician focuses on diagnosing and repairing computer hardware, including memory components. Both roles require technical knowledge and certifications but differ in daily tasks and work environments.

What is a DDR memory module?

DDR memory modules, or Double Data Rate memory, are a type of computer RAM that can transfer data on both the rising and falling edges of the clock signal, effectively doubling the data rate compared to previous single data rate memory. DDR memory is commonly used in desktops, laptops, and servers to provide fast and efficient temporary data storage that the processor can quickly access. Over time, several generations have been released, including DDR2, DDR3, DDR4, and DDR5, each offering improvements in speed, bandwidth, and power efficiency.

What are some common challenges faced by DDR memory engineers when working on new hardware designs?

DDR Memory Engineers often encounter challenges related to signal integrity, timing closure, and compatibility with evolving hardware platforms. Ensuring reliable high-speed data transmission and minimizing noise requires close collaboration with PCB designers and system architects. Additionally, adapting to rapidly changing memory standards and troubleshooting issues that arise during prototyping and testing are key aspects of the role. Effective communication and problem-solving skills are essential for resolving these challenges and delivering robust memory solutions.

What are the key skills and qualifications needed to thrive as a DDR memory engineer, and why are they important?

A DDR Memory Engineer typically needs a strong background in electrical or computer engineering, with expertise in digital logic, memory architectures, and signal integrity. Familiarity with tools like oscilloscopes, logic analyzers, simulation software (e.g., SPICE, Cadence), and industry standards such as JEDEC DDR specifications is required. Excellent problem-solving skills, attention to detail, and effective communication are crucial soft skills for collaborating across teams and troubleshooting complex issues. These competencies ensure reliable memory design, optimized performance, and successful integration in high-speed computing environments.
What are popular job titles related to Ddr Memory jobs in Chicago, IL? For Ddr Memory jobs in Chicago, IL, the most frequently searched job titles are:
What job categories do people searching Ddr Memory jobs in Chicago, IL look for? The top searched job categories for Ddr Memory jobs in Chicago, IL are:
Ddr Memory jobs near you

Architecture - I/O Architect

Eliyan

Mundelein, IL

Full-time

Re-posted 23 days ago

Job description

Join the leading chiplet startup! As an Eliyan NuLink PHY IO Architect, you will be working at a fast-paced early-stage startup creating technologies that fuel tomorrow’s chiplet based systems with best-in-class power, area, manufacturability, and design flexibility. You will drive the definition and development of cutting-edge ASICs from RTL to GDSII.  You will work with a cross-functional team of industry experts that operate from first principles, innovate, and push the envelope to create high-volume and high-performance manufacturable products. In this role, you will own the architecture, oversee design and validation, and be a focal point for customer and marketing team interactions. You will also focus on developing and improving design flows and methodologies to ensure high-quality, on-time delivery. We offer a fun work environment with excellent benefits. ONSITE M-F
Key Responsibilities:
  • Architecture: Define NuLink PHY subsystems (physical and logical/link layers) and hierarchical modular protocol bridges between PCIe, AXI4, APB, CHI, CXL (.io/.cache/.mem), DDR to name a few. Definition of a firmware first based hardware architecture approach.
  • Protocol Design: Design protocol conversion layers with transaction ordering, credit-based flow control, QoS, address translation, coherency management, and memory semantics across protocol domains 
  • Performance Evaluation and Optimization: Model and tune PHY data path, link protocols, and CDC architectures for protocol efficiency, bandwidth, latency, power, and signal integrity.  Conduct technical evaluation and benchmark analysis against internal and external IPs.
  • Collaboration: Partner with ASIC, firmware, and post-silicon teams. Support customer integration for compute-to-memory (CXL/DDR), processor interconnect (AXI/PCIe), and control plane (APB).  Create clear and comprehensive architecture specifications with foolproof integration guidelines. 
  • Validation: Review characterization plans for PLL, VCO, ATB, and link training. Create protocol testbenches validating transaction handling, latency, throughput, and compliance
  • Compliance: Ensure UCIe, PCIe, CXL, AMBA AXI/APB, and DDR specification compliance. Define interoperability requirements and protocol error handling. Be part of industry standards bodies and work groups to keep Eliyan's product implementations up to date with the latest versions of the standards.
  • Leadership: Mentor engineers on protocol implementation, timing constraints, and hierarchical design.  Effectively collaborate with industry technologists, business leaders and ability to network seamlessly with industry peers to influence stakeholders.
 
Minimum Qualifications:
  • Expertise in multiple areas of architecture definition, chip micro-architecture, protocol definition and implementation
  • Strong knowledge of two or more of the following connectivity protocols - PCIe, UCIe, UALink, Ethernet, DDR, AMBA
  • Strong scripting and automation skills
  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field
  • 8+ years' of experience
 
Ideal Qualifications:
  • 15+ years of experience in ASIC architecture with strong bias for practical logic design and influence of physical implementation, with a proven track record of leading teams through successful tapeouts
  • Performance modeling of hardware implementations with high level languages like C, C++ or SystemC
  • Adept at clocking and floorplan guidelines for PHY implementation
  • Extremely knowledgeable on RTL-to-GDSII flows, limitations, and flexibilities to improve productivity and power aware designs
  • Exceptional problem-solving skills.
 

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.