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Cuda Kernel Engineer Jobs in Maryland (NOW HIRING)

Deep expertise in Linux kernel internals: network and platform driver development, device tree ... Experience with CUDA. * Experience with high-reliability or fault-tolerant software design patterns.

Principal FSW Engineer

Lanham, MD · On-site

$135K - $181K/yr

Deep expertise in Linux kernel internals: network and platform driver development, device tree ... Experience with CUDA. * Experience with high-reliability or fault-tolerant software design patterns.

Cuda Kernel Engineer information

What is a CUDA Kernel Engineer?

Cuda Kernel Engineers are specialized software developers who design, implement, and optimize parallel computing algorithms using NVIDIA's CUDA platform. They write 'kernels,' which are functions that run on Graphics Processing Units (GPUs) to accelerate computational tasks in areas such as machine learning, scientific simulations, and graphics rendering. These engineers need strong skills in C/C++ programming, GPU architecture, and performance optimization techniques. Their work is crucial for applications that require high-speed data processing and efficient resource utilization.

What skills and qualifications are needed to be a CUDA Kernel Engineer?

To thrive as a CUDA Kernel Engineer, you need strong proficiency in C/C++ programming, parallel computing concepts, and a solid foundation in GPU architectures, typically supported by a degree in computer science or a related field. Expertise in NVIDIA CUDA toolkits, GPU profiling tools like Nsight, and familiarity with version control systems are essential. Analytical thinking, problem-solving abilities, and effective collaboration skills help engineers optimize code and work well within development teams. These skills and qualities are crucial for delivering high-performance, scalable GPU solutions in computationally intensive applications.

What are common challenges faced by CUDA Kernel Engineers when optimizing GPU code for performance?

Cuda Kernel Engineers often encounter challenges such as managing memory hierarchy efficiently, minimizing data transfer between host and device, and avoiding thread divergence. Ensuring optimal occupancy and maximizing parallelism while preventing bottlenecks like bank conflicts or uncoalesced memory access are also key concerns. Collaborating closely with software architects and data scientists is common, as solutions frequently require balancing algorithmic accuracy with hardware limitations. Addressing these challenges requires continuous profiling, testing, and iterative optimization.

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Senior Embedded Systems & Hardware-in-the-Loop Engineer

Johns Hopkins Applied Physics Laboratory

Laurel, MD • On-site

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 8 days ago


Key responsibilities

  • Lead the architecture and development of complete embedded systems, including hardware, firmware, and software components.

  • Design custom electronics, FPGA firmware, and real-time embedded software for HWIL test systems and advanced sensors.

  • Develop and integrate real-time HWIL test systems for missile seekers, optical sensors, and tracking systems.


Johns Hopkins Applied Physics Laboratory rating

9.6

Company rating: 9.6 out of 10

Based on 8 frontline employees who took The Breakroom Quiz

2nd of 75 rated research


Job description

Description
Would you be excited to architect complete embedded systems from hardware through firmware to software?
Are you interested in developing advanced hardware-in-the-loop test systems supporting cutting edge optical sensors and mission critical defense technologies?
If so, we're looking for someone like you to join our team at APL!
The Electro Optical Seeker and Infrared Systems group (A1F) of the Air and Missile Defense Sector (AMDS) is seeking a Senior Embedded Systems & Hardware-in-the-Loop Engineer to lead the architecture and implementation of complete embedded systems, custom electronics hardware, FPGA firmware, real-time embedded software, and sophisticated HWIL test systems.
As a Senior Embedded Systems & Hardware-in-the-Loop Engineer, you will:
  • Lead multi-disciplinary teams in architecting and developing complete embedded systems from concept through deployment
  • Design custom electronics including PCB layouts, FPGA firmware (VHDL/Verilog), and real-time C++ embedded software
  • Develop and integrate real-time HWIL test systems for advanced missile seekers, optical sensors, and tracking systems
  • Design embedded systems around FPGA MPSoC platforms (Xilinx Zynq UltraScale+) including carrier boards, PetaLinux OS, drivers, and applications
  • Implement real-time video/image processing pipelines using CUDA, OpenCV, GStreamer, and custom FPGA IP cores
  • Interface with advanced sensors (IR/visible cameras, LiDAR, fast steering mirrors, scene projectors) and develop MATLAB/Python analysis tools
  • Support field testing, lead design reviews (PDR, CDR), and provide technical leadership and mentoring

Qualifications
You will meet our minimum qualifications for the job if you have:
  • A BS degree in computer engineering, electrical engineering, computer science, or related discipline with 8+ years of experience
  • High proficiency in modern C++ (C++11/14/17) with real-time performance, multi-threading, and object-oriented architecture
  • Extensive FPGA firmware design experience using VHDL or Verilog (Xilinx Vivado or Intel Quartus)
  • Proven embedded systems design experience including hardware schematics, FPGA logic, and embedded software
  • Embedded Linux development experience including kernel programming, device drivers (V4L2), and PetaLinux/Yocto
  • Experience with video/image processing systems and high-speed data interfaces (10GbE, PCIe, Camera Link, DVI)
  • MATLAB proficiency and strong electrical engineering fundamentals (digital protocols, signal integrity, power systems)
  • Are able to obtain Interim Secret level security clearance by your start date and can ultimately obtain Secret level clearance. If selected, you will be subject to a government security clearance investigation and must meet the requirements for access to classified information. Eligibility requirements include U.S. citizenship

You'll go above and beyond our minimum requirements if you have:
  • An MS degree with 10+ years of experience leading technical teams through complete system development lifecycles
  • GPU programming experience (CUDA/OpenCL), MPSoC architecture expertise (Xilinx Zynq UltraScale+), or HWIL scene generation system development
  • Background in 6-DOF simulation, weapon systems (missiles, seekers, interceptors), or RTOS experience (FreeRTOS, VxWorks, RedHat)
  • Image compression implementation (JPEG2000, HTJ2K, H.264, H.265) or Python proficiency for test automation
  • Flight electronics design experience, precision timing systems (IRIG-B, GPS, PTP), or optical systems knowledge
  • Experience supporting hypersonic programs or high-speed flight test campaigns
  • Active Top Secret and SCI clearance

About Us
Why Work at APL?
The Johns Hopkins University Applied Physics Laboratory (APL) brings world-class expertise to our nation's most critical defense, security, space and science challenges. While we are dedicated to solving complex challenges and pioneering new technologies, what makes us truly outstanding is our culture. We offer a vibrant, welcoming atmosphere where you can bring your authentic self to work, continue to grow, and build strong connections with inspiring teammates.
At APL, we celebrate our differences of perspectives and encourage creativity and bold, new ideas. Our employees enjoy generous benefits, including a robust education assistance program, unparalleled retirement contributions, and a healthy work/life balance. APL's campus is located in the Baltimore-Washington metro area. Learn more about our career opportunities at https://www.jhuapl.edu/careers.
All qualified applicants will receive consideration for employment without regard to race, creed, color, religion, sex, gender identity or expression, sexual orientation, national origin, age, physical or mental disability, genetic information, veteran status, occupation, marital or familial status, political opinion, personal appearance, or any other characteristic protected by applicable law. APL is committed to providing reasonable accommodation to individuals of all abilities, including those with disabilities. If you require a reasonable accommodation to participate in any part of the hiring process, please contact Accessibility@jhuapl.edu.
The referenced pay range is based on JHU APL's good faith belief at the time of posting. Actual compensation may vary based on factors such as geographic location, work experience, market conditions, education/training and skill level with consideration for internal parity. For salaried employees scheduled to work less than 40 hours per week, annual salary will be prorated based on the number of hours worked. APL may offer bonuses or other forms of compensation per internal policy and/or contractual designation. Additional compensation may be provided in the form of a sign-on bonus, relocation benefits, locality allowance or discretionary payments for exceptional performance. APL provides eligible staff with a comprehensive benefits package including retirement plans, paid time off, medical, dental, vision, life insurance, short-term disability, long-term disability, flexible spending accounts, education assistance, and training and development. Applications are accepted on a rolling basis.
Minimum Rate
$105,000 Annually
Maximum Rate
$290,000 Annually

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