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Commission Windows Device Driver Jobs (NOW HIRING)

Rincon Research Corp

Embedded Software Engineer

Tucson, AZ · On-site

$101K - $124K/yr

Windows device driver development experience * Experience with middleware transport frameworks such as zeroMQ or Thrift * Basic understanding of electronic hardware such as microprocessors, FPGAs ...

Nwis

Windows Kernel Developer

Sterling, VA

$122K - $253K/yr

Nightwing is seeking experienced Windows Kernel Developers to support the design, development ... Strong understanding of operating system architecture and device drivers * Experience with system ...

Nightwing

Windows Kernel Developer

Sterling, VA · On-site

Nightwing is seeking experienced Windows Kernel Developers to support the design, development ... Strong understanding of operating system architecture and device drivers * Experience with system ...

Lockheed Martin

Windows CNO Software Engineer

Herndon, VA · On-site

$104K - $184K/yr

US citizenship is required Desired skills - Experience with writing effective Windows Kernel-level code and extensions (such as device drivers for networking, storage, audio, video, etc.) - Software ...

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How much do commission windows device driver jobs pay per hour?

As of Jul 15, 2026, the average hourly pay for commission windows device driver in the United States is $26.41, according to ZipRecruiter salary data. Most workers in this role earn between $15.38 and $32.21 per hour, depending on experience, location, and employer.
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ASIC/SOC Verification Engineer

ASIC/SOC Verification Engineer

Ramps International inc

San Jose, CA

Contractor

Re-posted 9 days ago

Job description

Job Description

Title: ASIC/SOC Verification Engineer

Location: San Jose, CA

Duration: Long term


Required Skills:

  • B.S., or M.S. in Computer Engineering or Electrical Engineering
  • Prior Verification experience and expertise in NVMe or other storage protocol required
  • In depth expertise in storage interface technologies: PCIe, other
  • In depth background in Verification development, debug, simulation, test bench creation and debug using relevant tools (Synopsys, Mentor, Cadence, or FPGA tools)
  • Exposure to Flash controller internal architecture and organization is desired
  • Must be highly motivated with excellent verbal and written communication skills.
  • Demonstrated attention to detail
  • Ability to meet aggressive project deadlines in a team environment
  • Ability to work successfully with cross-functional teams, including coordinating across organizational boundaries and geographies.
  • Ability to create near term value within a strategic research environment.
  • Comfortable working in a multinational environment and understands how to leverage cultural diversity

Responsibilities:

  • Verify internally developed RTL IP using 3rd party NVMe Verification IP
  • Develop NVMe Verification test suite to test internally developed RTL IP
  • Expertise in developing block level / system level verification environments using System Verilog and UVM
  • Expertise to develop BFMs / Checkers / monitors / Scoreboards
  • Experience in developing block/system level verification plans and tests
  • Must have capability to debug test failures to find the root cause
  • Experience in code / functional coverage
  • Experience in constrained random testing
  • Must have PCIe and NVMe or other storage protocol knowledge to build verification environment, debug issues and white box level testing
  • Working experience in Simulation tools like Mentor Modelsim/Questasim, Synthesis tools, Coverage tools, and Regression tools
  • Working experience in IP/SoC verification using AMBA AXI, DMA, FIFO, etc modules
  • Knowledge of scripting languages like Perl, Tcl
  • Work with other hardware/ software architects developing one of a kind innovative FPGA prototypes, contribute to feasibility studies & developing solutions
  • Assist architects developing Linux/ Windows device driver, test and debug
Additional Information

Vik Walters
RAMPS International, Inc
Work: 732-250-9064

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