... store execution, cache and memory subsystems Understanding of low power microarchitecture ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
... store execution, cache and memory subsystems Understanding of low power microarchitecture ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
... KV Cache, Speculative Decoding Familiarity with ML training methodologies such as FSDP, DDP, and ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
... KV Cache, Speculative Decoding Familiarity with ML training methodologies such as FSDP, DDP, and ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
CPU ML Microarchitect/RTL Engineer
$147K - $272K/yr
... store execution, cache and memory subsystems Understanding of low power microarchitecture ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
CPU ML Microarchitect/RTL Engineer
$147K - $272K/yr
... store execution, cache and memory subsystems Understanding of low power microarchitecture ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
... store execution, cache and memory subsystems Understanding of low power microarchitecture ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
... store execution, cache and memory subsystems Understanding of low power microarchitecture ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
SoC Validation Engineer
$181K - $318K/yr
Computer architectures (cache, memory hierarchy, data pipelines) and logic design. Experience with ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
SoC Validation Engineer
$181K - $318K/yr
Computer architectures (cache, memory hierarchy, data pipelines) and logic design. Experience with ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
SoC Validation Engineer
$147K - $272K/yr
Computer architectures (cache, memory hierarchy, data pipelines) and logic design. Experience with ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
SoC Validation Engineer
$147K - $272K/yr
Computer architectures (cache, memory hierarchy, data pipelines) and logic design. Experience with ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
... store execution, cache and memory subsystems Understanding of low power microarchitecture ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
... store execution, cache and memory subsystems Understanding of low power microarchitecture ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
SoC Validation Engineer
$171K - $302K/yr
Computer architectures (cache, memory hierarchy, data pipelines) and logic design. Experience with ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
SoC Validation Engineer
$171K - $302K/yr
Computer architectures (cache, memory hierarchy, data pipelines) and logic design. Experience with ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
GPU Design Engineer - Memory Hierarchy
$147K - $272K/yr
... cache, on-chip interconnect network, data compression or GPU pipeline Experience in timing and ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
GPU Design Engineer - Memory Hierarchy
$147K - $272K/yr
... cache, on-chip interconnect network, data compression or GPU pipeline Experience in timing and ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
... store execution, cache and memory subsystems Understanding of low power microarchitecture ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
... store execution, cache and memory subsystems Understanding of low power microarchitecture ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
... cache hierarchy estimation, and quantitative logic utilization/silicon efficiency analysis ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
... cache hierarchy estimation, and quantitative logic utilization/silicon efficiency analysis ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
Circuits Implementation Engineer
$147K - $272K/yr
... Knowledge of Cache design/architecture, memory hierarchy and scripting is a huge plus Solid ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
Circuits Implementation Engineer
$147K - $272K/yr
... Knowledge of Cache design/architecture, memory hierarchy and scripting is a huge plus Solid ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
Kernel Scheduler Engineer, Core OS
$147K - $272K/yr
... cache coherency. Minimum Qualifications BS/MS/PhD in Computer Science, Computer Engineering, or ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
Kernel Scheduler Engineer, Core OS
$147K - $272K/yr
... cache coherency. Minimum Qualifications BS/MS/PhD in Computer Science, Computer Engineering, or ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
Director, Product Management, AI Innovation
Santa Clara, CA · On-site
$147K - $299K/yr
Collaborate with ML scientists, engineers, and executive stakeholders to define and execute complex ... Cache optimization. * Ability to translate complex technical requirements concepts between CXOs ...
Director, Product Management, AI Innovation
Santa Clara, CA · On-site
$147K - $299K/yr
Collaborate with ML scientists, engineers, and executive stakeholders to define and execute complex ... Cache optimization. * Ability to translate complex technical requirements concepts between CXOs ...
Circuits Implementation Engineer
$172K - $305K/yr
... Cache design/architecture and memory hierarchy Solid understanding of industry-standard design ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
Circuits Implementation Engineer
$172K - $305K/yr
... Cache design/architecture and memory hierarchy Solid understanding of industry-standard design ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
Staff+ Software Engineer, Databases
San Francisco, CA · On-site
$320K - $485K/yr
Design and operate caching infrastructure, including CDC-driven cache invalidation, that keeps ... commissions/sales bonuses target and annual base salary for the role. Annual Salary: $320,000-$485 ...
Staff+ Software Engineer, Databases
San Francisco, CA · On-site
$320K - $485K/yr
Design and operate caching infrastructure, including CDC-driven cache invalidation, that keeps ... commissions/sales bonuses target and annual base salary for the role. Annual Salary: $320,000-$485 ...
CPU Top-Level Design Verification Engineer
$126K - $190K/yr
... cache hierarchies, and memory systems RTL development - Experience creating efficient ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
CPU Top-Level Design Verification Engineer
$126K - $190K/yr
... cache hierarchies, and memory systems RTL development - Experience creating efficient ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
CPU Top-Level Design Verification Engineer
$147K - $272K/yr
... cache hierarchies, and memory systems RTL development - Experience creating efficient ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
CPU Top-Level Design Verification Engineer
$147K - $272K/yr
... cache hierarchies, and memory systems RTL development - Experience creating efficient ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
CPU Top-Level Design Verification Engineer
$126K - $190K/yr
... cache hierarchies, and memory systems RTL development - Experience creating efficient ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
CPU Top-Level Design Verification Engineer
$126K - $190K/yr
... cache hierarchies, and memory systems RTL development - Experience creating efficient ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
Design Verification Engineer
$147K - $272K/yr
... cache management - Display Subsystem for variety of panels and products. These are just some ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
Design Verification Engineer
$147K - $272K/yr
... cache management - Display Subsystem for variety of panels and products. These are just some ... Additionally, this role might be eligible for discretionary bonuses or commission payments as well ...
Commission Intersystems Cache Developer information
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$147K - $272K/yr
Full-time
Medical, Dental, Retirement
Posted just now
Apple rating
8.1
Based on 666 frontline employees who took The Breakroom Quiz
5th of 30 rated technology retailers
Job description
Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product!
Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU integer, floating-point, and/or load/store execution for our performant cores.
Description
As a CPU Microarchitect/RTL Engineer, you will own or participate in the following:
• Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification
• RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals
• Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification
• Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance
• Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power
Preferred Qualifications
Expertise in one or more of the following areas: out-of-order execution, instruction scheduling, integer and floating point execution, load/store execution, cache and memory subsystems
Understanding of low power microarchitecture techniques
Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
Experience in C or C++ programming
Experience using an interpretive language such as Perl or Python
Minimum Qualifications
Minimum BS and 3+ years of relevant industry experience
Experience with microprocessor architecture
Experience with logic design principles with timing and power implications
Experience in Verilog or VHDL
Experience with simulators and waveform debugging process
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $147,400 and $272,100, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU integer, floating-point, and/or load/store execution for our performant cores.
Description
As a CPU Microarchitect/RTL Engineer, you will own or participate in the following:
• Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification
• RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals
• Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification
• Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance
• Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power
Preferred Qualifications
Expertise in one or more of the following areas: out-of-order execution, instruction scheduling, integer and floating point execution, load/store execution, cache and memory subsystems
Understanding of low power microarchitecture techniques
Understanding of high-performance techniques and trade-offs in a CPU microarchitecture
Experience in C or C++ programming
Experience using an interpretive language such as Perl or Python
Minimum Qualifications
Minimum BS and 3+ years of relevant industry experience
Experience with microprocessor architecture
Experience with logic design principles with timing and power implications
Experience in Verilog or VHDL
Experience with simulators and waveform debugging process
Pay & Benefits
At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $147,400 and $272,100, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
About Apple
Sourced by ZipRecruiter
Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Cupertino, CA, US
Year founded
1976