Cfa Python Jobs in California (NOW HIRING)

onsemi is seeking a Senior Engineer to join the Color Filter Array (CFA) Research and Development (R&D) team supporting CMOS image sensor technology. This role is intended for a self-driven, detail-oriented technical leader with deep semiconductor manufacturing experience who can drive process and design solutions from concept through characterization and transfer to manufacturing. The position requires hands-on expertise in reticle design and layout, CFA and microlens processing, FEOL CMOS imager device layout/design, and a strong understanding of FEOL semiconductor process flows. Coding experience is required to enable efficient data analysis and automation.

• BS (MS preferred) in Electrical Engineering, Materials Science, Physics, Chemistry, or a related engineering/science discipline.
• Minimum 10+ years of experience in the semiconductor industry, with direct experience supporting technology development and/or high-volume manufacturing.
• Required: Reticle design and layout experience (mask set definition, layout review, DRC/LVS/layout checks as applicable, and tape-out readiness).
• Required: Color filter (CFA) and microlens process development/integration experience for CMOS image sensors.
• Required: Experience laying out and designing FEOL CMOS imager device structures and understanding how layout intent impacts FEOL integration and performance.
• Strong understanding of FEOL semiconductor process flow (lithography, implant, oxidation/diffusion, deposition, etch, CMP, thermal processing) and integration tradeoffs.
• Required coding experience (e.g., Python, MATLAB, or similar) for data analysis, visualization, and workflow automation; familiarity with version control (e.g., Git) preferred.
• Preferred:
• Familiarity with broader semiconductor fab processes and toolsets beyond FEOL (e.g., metrology, defect inspection, and optical characterization)
• Experience in definition, implementation, and analysis of Design of Experiments (DOE) and statistical process control (SPC)
• Demonstrated technical leadership, including mentoring, project leadership, and cross-site/cross-functional collaboration
• Experience driving technology milestones through productization and manufacturing release (documentation, qualifications, and change control)
• Strong problem-solving skills with hands-on experience using 8D (or equivalent) to drive root-cause and corrective actions

• Excellent written and oral communication skills; able to communicate complex technical topics to diverse audiences

  Experience with image sensor optical stack modeling and/or characterization (e.g., CFA/microlens-related optical metrics and metrology)

• Lead development and optimization of CFA processes for CMOS image sensors, including coat/develop and photolithography process windows across multiple pixel architectures.
• Develop, integrate, and optimize microlens processes (materials, patterning, reflow/curing, and metrology) to meet optical and yield targets.
• Own reticle design and layout deliverables for R&D and productization, ensuring correct layer usage, alignment strategy, critical dimension intent, and manufacturability.
• Design and layout FEOL CMOS imager device structures (e.g., pixel, photodiode, transfer gate, isolation, and routing concepts) in collaboration with device/design teams to enable robust process integration.
• Drive FEOL process integration understanding by mapping device/layout intent to FEOL semiconductor process flows (litho, implant, oxidation/diffusion, deposition, etch, CMP, thermal steps), and troubleshooting excursions.
• Use Design of Experiments (DOE) to optimize and screen new process options; define split plans, success criteria, and statistically sound conclusions.
• Extract, analyze, and visualize probe, optical, and characterization data; develop scripts/tools to automate analysis, reporting, and data integrity checks.
• Apply structured problem solving (8D or equivalent) to overcome process challenges; lead root-cause analysis and corrective/preventive action plans.
• Partner with manufacturing and cross-functional teams to transfer new imaging processes/products into high-volume production, including documentation, control plans, and qualification support.
• Communicate technical status and recommendations via clear presentations and written reports; mentor junior engineers and contribute to patentable innovations.