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Assistant Computer Chip Engineer Jobs in Campbell, CA

Drive chip development execution from RTL to GDSII, ensuring architecture, implementation, and ... Bachelor's degree in Electrical Engineering, Computer Engineering, or related field * 15+ years of ...

Front-End CAD Engineer

Cupertino, CA · On-site

$2.0K/mo

  • Medical

  • Dental

  • Vision

Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...

Front-End CAD Engineer

Cupertino, CA

$2.0K/mo

  • Medical

  • Dental

  • Vision

Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...

Ability to automate and optimize CAD workflows for chip design verification. * Ability to interface ... We do not have boundaries between engineering and research, and we expect all of our technical ...

... computer chip, the Wafer-Scale Engine (WSE), and the systems that harness its unparalleled power ... Handle engineering escalations and collaborate with other teams to resolve complex technical ...

New

... coding assistants • Experience communicating technical decisions and project status to cross ... for chip-level CAD methodology and integration flows • Experience with hierarchical chip ...

We are seeking a Sr. Mechanical Design Engineer to join our multi-disciplinary team focused on ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...

Description We are seeking a Sr. Mechanical Design Engineer to join our multi-disciplinary team ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...

Drive chip development execution from RTL to GDSII, ensuring architecture, implementation, and ... Bachelor's degree in Electrical Engineering, Computer Engineering, or related field * 15+ years of ...

Senior Electrical Engineer

Fremont, CA · On-site

$120K - $165K/yr

The engineer will work closely with principal engineers, scientists, firmware/software engineers ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...

New

Test Engineer

San Jose, CA · On-site

  • Retirement

Efficient Computer is looking for a Test Engineer with hands-on DFT and fabless semiconductor test ... Own test engineering across multiple active chip programs simultaneously * Build scalable test ...

Showing results 41-60

Assistant Computer Chip Engineer information

See Campbell, CA salary details

$38.2K

$102.7K

$155.7K

How much do assistant computer chip engineer jobs pay per year?

As of Aug 19, 2026, the average yearly pay for assistant computer chip engineer in Campbell, CA is $102,725.00, according to ZipRecruiter salary data. Most workers in this role earn between $81,600.00 and $120,900.00 per year, depending on experience, location, and employer.

What is the difference between Assistant Computer Chip Engineer vs Hardware Design Engineer?

AspectAssistant Computer Chip EngineerHardware Design Engineer
Required CredentialsBachelor's in Electrical Engineering or Computer EngineeringBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields
Work EnvironmentResearch labs, semiconductor companies, tech firmsDesign firms, semiconductor companies, tech corporations
Employer & Industry UsageCommon in tech and semiconductor industriesUsed in hardware development and chip design sectors
Common Search & ComparisonYesYes

The Assistant Computer Chip Engineer typically supports chip development through testing and analysis, often working under senior engineers. Hardware Design Engineers focus on designing and developing the physical architecture of chips. Both roles require similar educational backgrounds and are integral to the semiconductor industry, but they differ mainly in responsibilities and focus areas.

How much does an assistant computer chip engineer make?

An assistant computer chip engineer typically earns between $70,000 and $100,000 annually, depending on experience, location, and company size. Entry-level positions may start lower, while those with specialized skills in hardware design or verification can earn higher salaries.

What are the most commonly searched types of Computer Chip Engineer jobs in Campbell, CA?

The most popular types of Computer Chip Engineer jobs in Campbell, CA are:

What cities near Campbell, CA are hiring for Assistant Computer Chip Engineer jobs?

Cities near Campbell, CA with the most Assistant Computer Chip Engineer job openings:

Infographic showing various Assistant Computer Chip Engineer job openings in Campbell, CA as of August 2026, with employment types broken down into 1% As Needed, 79% Full Time, 17% Part Time, 2% Contract, and 1% Nights. Highlights an 81% Physical, 2% Hybrid, and 17% Remote job distribution, with an average salary of $102,725 per year, or $49.4 per hour.

Sr. Full Chip Physical Verification Engineer (Silicon Engineering)

SpaceX

Palo Alto, CA

$175K - $280K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 19 days ago


SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 148 frontline employees who took The Breakroom Quiz

17th of 72 rated aerospace companies


Job description

SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING)

At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe. 

We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation silicon for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.   

RESPONSIBILITIES:

  • Own and execute full-chip DRC, LVS, ESD, PERC and antenna signoff using industry standard tools like Calibre, ICV, or Pegasus
  • Develop, maintain, and optimize physical verification flows for advanced node SoC's.
  • Interpret and implement foundry Design Rule Manuals (DRM) - translate rule updates into verified flow changes
  • Debug and resolve complex DRC/LVS violations across hierarchical full-chip designs
  • Perform ESD verification - validate protection strategies, current paths, and CDM/HBM compliance
  • Drive tapeout readiness by coordinating signoff across block and top-level and Hard IP design teams
  • Engage directly with foundry teams to resolve DRM ambiguities and waiver requests.
  • Develop/modify design flows as needed to meet the overall design quality of results and chip integration requirements.Leverage AI agents to automate rule deck validation, violation triage, and signoff reporting workflows

BASIC QUALIFICATIONS:

  • Bachelor's degree in electrical engineering, computer engineering or computer science
  • 5+ years of ASIC and/or physical design flow development experience in industry

PREFERRED SKILLS AND EXPERIENCE:

  • Experience and deep understanding of SOC top level physical design flows (floor-planning, I/O, bump & RDL planning, hard IP integration, partitioning, power/ground grid generation, pin assignment, DFT, partition hardening, special clock handling, feedthrough flows, special interface/interconnect planning and implementation)
  • Experience in IP integration (e.g. memories, I/O's, analog IPs, SerDes, DDR etc.)
  • Deep expertise in DRC, LVS, PERC and ESD verification methodologies
  • Hands-on proficiency with Calibre, ICV (IC Validator), or Pegasus
  • Direct foundry DRM experience - able to read, interpret, and implement complex rule decks
  • Experience at advanced nodes (4nm and below)
  • Experience with large SOC designs (>10M gates) with frequencies in excess of 1GHZ
  • Excellent scripting skills (csh/bash, Perl, Python TCL, Makefile etc.)
  • Self-driven individual with a can-do attitude, and an ability to work in a dynamic group environment

ADDITIONAL REQUIREMENTS:    

  • Ability to work extended hours and weekends as needed to meet critical project milestones    

COMPENSATION AND BENEFITS:

Pay range:    
Physical Design Engineer/Senior: $175,000.00 - $280,000.00/per year    
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.


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About SpaceX

Sourced by ZipRecruiter

Industry

Aerospace product and parts manufacturing, data services, guided missile and space vehicle manufacturing and satellite telecommunications

Company size

1,001 - 5,000 Employees

Headquarters location

Hawthorne, CA, US