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Asic Design Ai Jobs (NOW HIRING)

Conductor

ASIC Design Engineer

Austin, TX · On-site

$150 - $200/hr

Hands-on experience with ASIC design process for AI chips * Hands-on experience with multi-die/multi-chiplet/MCM designs #J-18808-Ljbffr

Conductor

ASIC Design Engineer

Boston, MA · On-site

$150 - $200/hr

Hands-on experience with ASIC design process for AI chips * Hands-on experience with multi-die/multi-chiplet/MCM designs #J-18808-Ljbffr

Socket.dev

ASIC Design Engineer

San Diego, CA · On-site

$100 - $125/hr

Qualcomm is seeking talented ASIC Design Engineers to join our growing SoC and ASIC Design ... AI, mobile, automotive, data center, and next-generation semiconductor technologies. Engineers in ...

Nutanix

ASIC Design Engineer

San Diego, CA · On-site

$100 - $125/hr

Qualcomm is seeking talented ASIC Design Engineers to join our growing SoC and ASIC Design ... AI, mobile, automotive, data center, and next-generation semiconductor technologies. Engineers in ...

Qualcomm

ASIC Design Engineer

San Diego, CA · On-site

Qualcomm is seeking talented ASIC Design Engineers to join our growing SoC and ASIC Design ... AI, mobile, automotive, data center, and next-generation semiconductor technologies. Engineers in ...

Qualcomm

ASIC Design Engineer

Santa Clara, CA · On-site

$150 - $200/hr

Exposure to AI/ML based design methodologies is a strong plus Minimum Qualifications * Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification ...

Nvidia

Senior ASIC Design Engineer

OR · On-site +1

More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading ...

Nvidia

Senior ASIC Design Engineer

Santa Clara, CA · Hybrid

More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading ...

Nvidia

Senior ASIC Design Engineer

Santa Clara, CA · Hybrid

More recently, GPU deep learning ignited modern AI - the next era of computing. NVIDIA is a ... NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading ...

Positron AI

ASIC Design Engineer

Austin, TX · On-site

$225K - $350K/yr

About Positron AI Positron AI specializes in developing custom hardware systems to accelerate AI ... Role Overview As a Senior ASIC Design Engineer, you will take a leadership role in defining ...

Positron AI

$250/hr

Positron AI specializes in developing custom hardware systems to accelerate AI inference. These ... As a Senior ASIC Design Engineer, you will take a leadership role in defining, implementing, and ...

Ayar Labs

Principal Engineer, ASIC Design

San Jose, CA

$170K - $223K/yr

San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data ...

Positron AI

ASIC Design Engineer

Austin, TX · On-site

$250/hr

Positron AI specializes in developing custom hardware systems to accelerate AI inference. These ... As a Senior ASIC Design Engineer, you will take a leadership role in defining, implementing, and ...

Atom Computing

Senior ASIC Design Engineer

Austin, TX · On-site

$140K - $175K/yr

Atom Computing is seeking a Senior ASIC Designer to design and develop a digital signal processing ... We may use artificial intelligence (AI) tools to support parts of the hiring process, such as ...

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Asic Design Ai information

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$94K

$150.2K

$202K

How much do asic design ai jobs pay per year?

As of Sep 8, 2026, the average yearly pay for asic design ai in the United States is $150,195.00, according to ZipRecruiter salary data. Most workers in this role earn between $131,500.00 and $180,000.00 per year, depending on experience, location, and employer.

What is an ASIC Design AI engineer?

ASIC Design AI engineers are professionals who specialize in designing Application-Specific Integrated Circuits (ASICs) optimized for artificial intelligence (AI) workloads. They work on creating custom hardware that accelerates AI computations, such as deep learning, by tailoring circuits to specific algorithms and performance requirements. Their responsibilities include architecture design, logic implementation, verification, and collaborating with software and hardware teams to ensure efficient deployment. These engineers play a critical role in enabling faster, more efficient AI processing in devices ranging from smartphones to data centers.

What are the key skills and qualifications needed to thrive as an ASIC Design AI engineer?

To thrive as an ASIC Design AI Engineer, you need a solid background in digital design, computer architecture, and VLSI, typically supported by a degree in electrical engineering or computer engineering. Proficiency with hardware description languages (such as Verilog or VHDL), EDA tools (like Synopsys or Cadence), and knowledge of AI/ML frameworks is crucial. Strong problem-solving, teamwork, and communication skills help you collaborate with multidisciplinary teams and tackle complex design challenges. These skills ensure the development of efficient, high-performance AI hardware that meets both technical and business objectives.

How do ASIC Design AI engineers typically collaborate with software and hardware teams during a project?

ASIC Design AI engineers frequently work in close coordination with both hardware and software teams to deliver optimized AI hardware solutions. They often translate software algorithms into efficient hardware architectures, requiring regular communication with software engineers to understand model requirements and constraints. Collaboration with hardware teams is essential to integrate AI accelerators into larger systems and to ensure power, performance, and area objectives are met. Regular design reviews, cross-functional meetings, and joint debugging sessions are common practices to ensure seamless integration and project success.

What is the difference between Asic Design Ai vs FPGA Design Engineer?

AspectAsic Design AiFPGA Design Engineer
CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fields; experience with AI hardwareBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; FPGA design experience
Work EnvironmentDesigning custom chips for AI applications, often in R&D or specialized manufacturingDeveloping and testing FPGA prototypes, often in hardware development or embedded systems
Industry UsageUsed in AI hardware accelerators, data centers, and semiconductor companiesUsed in prototyping, testing, and embedded systems across various industries

While both roles involve hardware design, Asic Design Ai focuses on creating custom AI chips, whereas FPGA Design Engineers develop flexible FPGA prototypes. Both require strong electrical engineering skills but differ in design focus and application environments.

Infographic showing various Asic Design Ai job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 89% Full Time, 7% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $150,195 per year, or $72.2 per hour.

ASIC Design Engineer

Austin, TX • On-site

Conductor
See more jobs at Conductorexternal

$150 - $200/hr

Other

Posted 29 days ago

Job description

We’re looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer.

Ideal Background:
  • Hands-on experience with multiple advanced node tapeouts
  • Ownership of ASIC design portion of at least one block in multiple advanced node tapeouts
  • Understanding of PPA improvement and what levers exist for each level of the stack
  • Ability to think creatively about methodology for fast design iterations
Nice to Have:
  • Hands-on experience with ASIC design process for large die (ideally reticle max) chips
  • Hands-on experience with ASIC design process for AI chips
  • Hands-on experience with multi-die/multi-chiplet/MCM designs
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