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Analog Readout Sensor Jobs (NOW HIRING)

OmniVision Technologies

Analog Design Engineer

Irvine, CA · On-site

$125K - $135K/yr

Perform sub-blocks and whole image sensor readout circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice; Perform design verification such as DRC, LVS, PERC ...

OMNIVISION

Analog Design Engineer

Irvine, CA · On-site

$125K - $135K/yr

Perform sub-blocks and whole image sensor readout circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice; Perform design verification such as DRC, LVS, PERC ...

OMNIVISION

Analog Design Engineer

Irvine, CA

Perform sub-blocks and whole image sensor readout circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice; Perform design verification such as DRC, LVS, PERC ...

OMNIVISION

Analog Design Engineer

Irvine, CA

$125K - $135K/yr

Perform sub-blocks and whole image sensor readout circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice; Perform design verification such as DRC, LVS, PERC ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA

* Conduct end-to-end design and development of advanced CMOS Image Sensor (CIS) technologies with a ... complex readout formats including Dual Conversion Gain (DCG), Correlated Double Sampling (CDS ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Description • Conduct end-to-end design and development of advanced CMOS Image Sensor (CIS ... complex readout formats including Dual Conversion Gain (DCG), Correlated Double Sampling (CDS ...

OMNIVISION

Analog Design Engineer

Santa Clara, CA

$156K - $160K/yr

• Conduct end-to-end design and development of advanced CMOS Image Sensor (CIS) technologies with ... complex readout formats including Dual Conversion Gain (DCG), Correlated Double Sampling (CDS ...

OMNIVISION

Sr. Analog Design Engineer

Santa Clara, CA · On-site

Perform sub-blocks and whole image sensor readout circuit simulation (DCG function, noise, PSRR, H-banding, etc.) by simulators such as Cadence Spectre, Analog FastSPICE (AFS), Empyrean ALPS and ...

OMNIVISION

Sr. Analog Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

Perform sub-blocks and whole image sensor readout circuit simulation (DCG function, noise, PSRR, H-banding, etc.) by simulators such as Cadence Spectre, Analog FastSPICE (AFS), Empyrean ALPS and ...

OMNIVISION

Sr. Analog Design Engineer

Santa Clara, CA

$156K - $160K/yr

Perform sub-blocks and whole image sensor readout circuit simulation (DCG function, noise, PSRR, H-banding, etc.) by simulators such as Cadence Spectre, Analog FastSPICE (AFS), Empyrean ALPS and ...

OMNIVISION

WI · On-site

$195K/yr

You will design circuits for pixel array readout, amplifiers, ADCs, low noise regulators, and other ... Debug, characterize and optimize performance for fabricated sensor chips. * Contribute to circuit ...

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Analog Readout Sensor information

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How much do analog readout sensor jobs pay per year?

As of Sep 11, 2026, the average yearly pay for analog readout sensor in the United States is $142,396.00, according to ZipRecruiter salary data. Most workers in this role earn between $117,500.00 and $139,000.00 per year, depending on experience, location, and employer.

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For Analog Readout Sensor jobs, the most frequently searched job titles are:

Infographic showing various Analog Readout Sensor job openings in the United States as of August 2026, with employment types broken down into 90% Full Time, 6% Part Time, 3% Contract, and 1% Nights. Highlights an 90% Physical, 3% Hybrid, and 7% Remote job distribution, with an average salary of $142,396 per year, or $68.5 per hour.

Analog Design Engineer

Irvine, CA • On-site

OmniVision Technologies
Software Development • 1 - 5K employees
Learn more about OmniVision Technologiesexternal

$125K - $135K/yr

Full-time

Re-posted 20 days ago

Job description

Conduct design and development of image sensor technologies, work on transistor level design of analog and mixed-signal circuits for CMOS Image Sensor such as asic_pixel array, column-amplifier, comparator, ramp generator, ASRAM and XDEC by using Cadence Virtuoso; Work on whole chip floorplan design and pad frame; Work on analog and mixed signal circuits layout design by Cadence Virtuoso, such as column_array; Collaborate with layout engineer on whole chip layout integration and improvement by Cadence Virtuoso; Perform sub-blocks and whole image sensor readout circuit simulation by simulators such as Analog FastSPICE (AFS), Empyrean ALPS and NanoSpice; Perform design verification such as DRC, LVS, PERC check by using Siemens Calibre; Perform whole chip IR drop check by using Ansys Totem; Conduct script modification using Perl programming language; Collaborate with Digital Engineer to define and design the analog to digital interface; Collaborate with verification, process, test, and application engineers to debug, characterize and optimize performance of fabricated image sensors; Analyze project-specific specifications, such as speed, linearity, noise, power consumption, etc, and improve circuit designs or implement innovative solutions to meet performance requirements; Define corners based on chip operating conditions, ensuring the chip meets specifications and operates reliably with sufficient margin for robustness under all conditions; Propose innovative and creative solutions along with new circuit R&D and be ahead of current technology.
Requirements:
Master's degree or foreign equivalent degree in Electrical Engineering, Computer Engineering, or related fields. Require coursework in Analog Integrated Circuit and Power Electronics Design.
Require knowledge or skills of:
Analyze analog and mixed-signal circuits; troubleshoot and resolve circuit issues;
Design analog/mixed-signal circuits based on specifications; optimize for higher performance;
Perform circuit simulations using tools such as Cadence Spectre or HSPICE;
Understand layout impact on circuit performance; apply layout strategies to minimize adverse effects;
Knowledge of semiconductor device physics and its influence on circuit behavior;
Analyze and mitigate thermal, flicker, and shot noise in analog designs;
Knowledge of integrated circuit fabrication processes and incorporating process variation considerations into schematic and layout design.
Design and analyze power management circuits, including LDOs and charge pumps.
Annual base salary for this role in California, US is expected to be between $125,000 - $135,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.

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