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Analog Mixed Signal Layout Engineer Jobs in Indiana

Senior Electrical Engineer

Indianapolis, IN · On-site

$102K - $133K/yr

... signal processing, light software development, mixed signal design, and cable design and ... Schematic entry and board layout using a schematic capture tool and layout tool. * Experience with ...

Senior Electrical Engineer

Indianapolis, IN · On-site

$102K - $133K/yr

... signal processing, light software development, mixed signal design, and cable design and ... Schematic entry and board layout using a schematic capture tool and layout tool. * Experience with ...

Coordinate with PCB layout to ensure proper routing, isolation, creepage/clearance, and EMI/EMC ... Proficiency with ECAD tools (e.g., Altium Designer) and schematic capture for mixed-signal and ...

Engineer II, Hardware

Lafayette, IN · On-site

$74K - $100K/yr

Circuit design including circuit simulation, schematic capture, and PCB layout tools. * Electrical ... theories of analog circuits, power supplies, microcontrollers, high frequency signal ...

Engineer II, Hardware

Lafayette, IN · On-site

$118K - $156K/yr

... layout tools. • Electrical verification testing using lab equipment such as power supplies ... theories of analog circuits, power supplies, microcontrollers, high frequency signal ...

Engineer II, Hardware

Lafayette, IN · On-site

$118K - $156K/yr

Circuit design including circuit simulation, schematic capture, and PCB layout tools. Electrical ... theories of analog circuits, power supplies, microcontrollers, high frequency signal ...

... mixed signal systems, and subsystems. The position requires experience in RF testing techniques ... The Senior RF Engineer will provide oversight and mentorship to junior engineers and report on ...

Collaborate with PCB layout engineers to ensure signal integrity, power integrity, EMI/EMC, creepage/clearance, and manufacturability requirements are met. * Plan and execute boardlevel bringup ...

Showing results 21-40

Analog Mixed Signal Layout Engineer information

What is the difference between Analog Mixed Signal Layout Engineer vs Digital IC Layout Engineer?

AspectAnalog Mixed Signal Layout EngineerDigital IC Layout Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, knowledge of analog/mixed-signal designBachelor's or Master's in Electrical Engineering or Computer Engineering, focus on digital design
Work EnvironmentDesigning analog/mixed-signal circuits, working closely with analog designersImplementing digital logic layouts, collaborating with digital design teams
Industry UsageSemiconductor companies, ASIC/FPGA design firmsSemiconductor companies, FPGA/ASIC design firms

Analog Mixed Signal Layout Engineers focus on designing layouts for circuits that combine analog and digital signals, requiring specialized knowledge of analog components. Digital IC Layout Engineers primarily work on digital logic layouts, emphasizing high-speed digital circuits. Both roles require strong technical skills and are vital in semiconductor design, but they differ in the type of circuits and design considerations involved.

What cities in Indiana are hiring for Analog Mixed Signal Layout Engineer jobs?

Cities in Indiana with the most Analog Mixed Signal Layout Engineer job openings:

Senior Signal Processor (SIGPRO) Engineer SPY-1

Crane, IN

Kratos Defense
National Security and International Affairs • 1 - 5K employees

Full-time

Re-posted 14 days ago


Kratos Defense & Security Solutions rating

7.8

Company rating: 7.8 out of 10

Based on 10 frontline employees who took The Breakroom Quiz


Job description

Kratos is seeking an experienced Senior Signal Processor (SIGPRO) Engineer to support the sustainment, overhaul, and modernization of the AN/SPY-1 radar system, with a specific focus on the signal processor subsystem. The SME will provide in-depth technical guidance across engineering, sustainment, and depot-level repair planning. This position plays a critical role in restoring and modernizing radar capabilities by supporting design recovery, system troubleshooting, test strategy development, and obsolescence resolution for legacy digital and analog processing architectures.

Key Responsibilities:

  • Serve as the technical lead for the AN/SPY-1 Signal Processor subsystem across all radar variants (D, D(V), D(MOD)).
  • Lead efforts to analyze and document the design and functional behavior of legacy signal processor components, including digital processing modules, interface cards, and timing assemblies.
  • Support design recovery and traceability efforts, working from GFI, limited technical data, or harvested hardware.
  • Define and support the development of prototype subassemblies, repair processes, and test capabilities to validate organic sustainment approaches.
  • Develop and validate functional test procedures, signal flow diagrams, and performance benchmarks.
  • Identify critical components at risk due to obsolescence, and support alternate part qualification, reverse engineering, or redesign as necessary.
  • Coordinate with systems engineers, test engineers, and OEM partners to ensure alignment with weapon system interface requirements and mission-critical timing/data processing functionality.
  • Provide technical input to Integrated Technical Data Packages (ITDPs), depot stand-up planning, and operator/maintainer training materials.
  • Ensure test and repair processes comply with NAVSEA and METCAL standards where applicable.

Required Qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • Minimum of 10+ years of experience with radar or advanced signal processing systems, including 5+ years supporting AN/SPY-1 or equivalent phased array radar systems.
  • Deep understanding of legacy digital processing architectures, A/D conversion, timing synchronization, and signal conditioning.
  • Experience with diagnostics, troubleshooting, and repair at the board and component level.
  • Familiarity with tools used for signal integrity analysis, logic analyzers, and boundary scan testing.
  • Proven ability to read, interpret, and reverse-engineer technical data, schematics, and embedded processing logic.
  • Experience developing or reviewing test procedures and technical documentation for government sustainment programs.
  • Active Secret Clearance
 

Preferred Qualifications:

  • Prior work with AEGIS Combat System interfaces, SPY-1 timing architectures, or radar track processing functions.
  • Familiarity with DoD obsolescence mitigation strategies, including reverse engineering, emulation, and form-fit-function redesign.
  • Experience supporting ORDALT implementation, depot activation, or prototype validation.
  • Knowledge of Model-Based Systems Engineering (MBSE) practices or digital engineering toolsets.
  • Active TS/SCI Clearance
 

Travel: ~10-20%, including to shipyards, government labs, and partner facilities.

(No phone calls please)

 #LI-AC1

#LI-Onsite


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