Position: Physical Design Engineer / Staff Engineer Location : San Jose CA Contract More than 12 months Relocation consultants are also considerable.. Job Responsibilities: We are seeking experienced ...
Violet Ink
4 jobs near Columbus, OH
Position: Physical Design Engineer / Staff Engineer Location : San Jose CA Contract More than 12 months Relocation consultants are also considerable.. Job Responsibilities: We are seeking experienced ...
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Title: Full Stack .NET Developer Location:Scarborough, ON, Canada,M1L4S2 Fulltime Key Responsibilities • Design, develop, and maintain scalable web applications using .NET / .NET Core and Angular ...
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Application Support Engineer
$80 - $90K/hr
Job Title: Jr. Application Support Engineer / SRE Location : NYC, NY Fulltime Interview type: L1 - Video and L2 - Face to Face Salary: $80-$90k/Annum Position Overview: The Wealth Management ...
Application Support Engineer
$80 - $90K/hr
Job Title: Jr. Application Support Engineer / SRE Location : NYC, NY Fulltime Interview type: L1 - Video and L2 - Face to Face Salary: $80-$90k/Annum Position Overview: The Wealth Management ...
Job description
Position: Physical Design Engineer / Staff Engineer
Location : San Jose CA
Contract More than 12 months
Relocation consultants are also considerable..
Job Responsibilities:
We are seeking experienced Physical Design Engineers with expertise in top-level signoff for complex SoCs on advanced nodes (7nm/5nm/3nm). Candidates should have multiple full-cycle tapeouts and strong experience in signoff-to-tapeout closure.
Key Responsibilities:
- Drive full-chip/top-level signoff activities
- Collaborate with RTL, PD, STA, EMIR, and Foundry teams
- Resolve timing, power, clocking, and reliability challenges
- Improve PPA and signoff turnaround time
- Support independent tapeout closure
Specialized Expertise in One or More Areas:
- EMIR / Power Integrity (RedHawk-SC, Voltus)
- Timing & STA (PrimeTime/PT-SI, Tempus, MMMC)
- Clock Distribution / CTS (Innovus, ICC2, H-Tree, Mesh)
Requirements:
- 8+ years in Physical Design / Signoff
- Hands-on experience with 7nm/5nm/3nm tapeouts
- Strong knowledge of OCV, AOCV/POCV, STA methodologies
- Scripting skills in Tcl/Python/Perl
- Experience with HPC, AI accelerators, or large-scale SoCs preferred
- Exposure to TSMC/Samsung/Intel signoff methodologies is a plus
About Violet Ink
Sourced by ZipRecruiter
Company size
11 - 50 Employees
Headquarters location
San Jose, CA, US
Year founded
2007