Pdk International

41 Pdk International Jobs Hiring Near You

This position requires compliance with the International Traffic in Arms Regulations (ITAR). All accepted applicants must be U.S. Persons. ITAR defines a U.S. Person as U.S. citizen, U.S. Permanent ...

DIRECTOR OF MAINTENANCE

Atlanta, GA ยท On-site

$170K - $200K/yr

... International operational aviation experience (civil, military, or government), operation of large-cabin business jets. * Gulfstream/ G550 Experience * DOM Experience * Locally Atlanta based near PDK ...

DIRECTOR OF MAINTENANCE

Atlanta, GA ยท On-site

$170K - $200K/yr

... International operational aviation experience (civil, military, or government), operation of large-cabin business jets. * Gulfstream/ G550 Experience * DOM Experience * Locally Atlanta based near PDK ...

Utilize SkyWater PDK's and provide feedback to internal teams on issues, improvements, capabilities ... Person Required: This position requires compliance with the International Traffic in Arms ...

Senior Technology Engineer

San Jose, CA ยท On-site

$122K - $168K/yr

Lattice OverviewThere is energy here...energy you can feel crackling at any of our international ... Ensure PDK readiness, and ensure alignment between internal EDA, design teams, and foundry ...

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CAD Engineer - Staff (PDK)

skywater

Minneapolis, MN โ€ข On-site, Remote

Other

Posted 2 days ago


Job description

Position Summary:ย 
This is a full-time permanent position ideally based in the Minneapolis, Minnesota area, though consideration will be given to remote location.ย  The Electronic Design Automation (EDA) engineer will collaborate effectively with cross-functional teams providing design enablement collateral for semiconductor integrated circuit (IC) technologies . The EDA engineer will be a significant technical contributor to a broad array of IC development projects, including IP development and integration, and Process Design Kit (PDK) development and release.ย  The ideal candidate will have strong skills in DRC coding, Calibre SVRF, or similar EDA tools and methodologies.
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Major Area of Accountability:
โ€ขDevelopment and release of PDK Design Rule checks using industry-standard EDA tools.ย 
โ€ขTechnical liaison activities between internal teams, design houses, customers, and foundries to ensure successful development, tape-out, and manufacture of customer ICs.ย 
โ€ขTechnical support for customers using SkyWater PDKs and IP collateral.
โ€ขManagement of 3rd party PDK and IP developers to ensure correct collateral and accuracy necessary for IC development partners to effectively design into SkyWater technologies.
โ€ขEnablement and improvement of front to back-end IC design flows and manufacturing through DRC development, analysis, validation, and release.ย 
โ€ขWorking closely with design, layout, and process engineers to understand and incorporate semiconductor technology requirements into PDKs.ย 
โ€ขPerforming other duties as assigned.
ย 
Required Qualifications:
Education: BS or MS (preferred) in Electrical Engineering.
Experience and/or Training:
โ€ข 3-5 years of experience in the semiconductor industry.
โ€ข 3-5 years of experience in PDK and/or EDA development, working in or with semiconductor foundry companies.
โ€ข Solid understanding of IC design (architecture to RTL to GDSII) & IC fabrication (tape-out to post-silicon validation and testing).
โ€ข Familiarity with the EDA design flow in multiple process nodes and technologies using industry-standard EDA tools and foundry PDKs.
โ€ข Strong scripting skills: Python, Linux shell, etc.
โ€ข Fluent in written and spoken English, with excellent technical writing and verbal communication skills.
ย 

U.S. Person Required: This position requires compliance with the International Traffic in Arms Regulations (ITAR). All accepted applicants must be U.S. Persons. ITAR defines a U.S. Person as U.S. citizen, U.S. Permanent Resident, Political Asylee, or Refugee.

ย 
Preferred Qualifications
Experience and/or Training:
โ€ข Significant experience with the use of or enablement of Cadence, Mentor, and Synopsys semiconductor EDA tools.
โ€ข Knowledge and experience in developing and/or using physical verification tools (DRC, ERC, LVS/PEX) and DFM tooling.ย 
โ€ข Experience in IC layout in Virtuoso or Allegro package design
โ€ข Experience with chemical-mechanical polishing (CMP) shape density filling techniques.
โ€ข Experience with data preparation and/or OPC methodologies.
โ€ข Customer facing experience.