Drive innovation at Cognichip as a Senior FPGA Design Engineer, merging chip technology with machine learning. Take the lead on creating libraries that guide AI in chip design processes. This hybrid ...
Cognichip
3 jobs near Columbus, OH
Drive innovation at Cognichip as a Senior FPGA Design Engineer, merging chip technology with machine learning. Take the lead on creating libraries that guide AI in chip design processes. This hybrid ...
Staff AI Solution Architect
Redwood City, CA · On-site
$77.25 - $101.50/hr
Cognichip is enabling customers to harness the power of AI to transform their silicon design workflows. The Staff AI Solution Architect will serve as the primary technical point of contact for ...
Staff AI Solution Architect
Redwood City, CA · On-site
$77.25 - $101.50/hr
Cognichip is enabling customers to harness the power of AI to transform their silicon design workflows. The Staff AI Solution Architect will serve as the primary technical point of contact for ...
Job Title Senior ASIC Design Manager About Us At Cognichip, we are building the next-generation AI-enabled solutions to empower semiconductor design engineers with a 10x productivity boost through ...
Job Title Senior ASIC Design Manager About Us At Cognichip, we are building the next-generation AI-enabled solutions to empower semiconductor design engineers with a 10x productivity boost through ...
Full-time
Posted 8 days ago
Job description
Drive innovation at Cognichip as a Senior FPGA Design Engineer, merging chip technology with machine learning. Take the lead on creating libraries that guide AI in chip design processes.
This hybrid role involves high-level collaboration across engineering disciplines, and you will design libraries, benchmarks, and ecosystems essential for enhancing design workflows. With 5-10 years of hands-on experience in RTL design, you will apply your skills in developing robust testbenches and automating design processes using SystemVerilog and Python. Engage with a talented team to push the boundaries of AI in chip technology.
Key Responsibilities:
• Translate silicon design constraints with cross-functional teams
• Develop and maintain RTL libraries and benchmarks
• Create verification environments using industry tools
• Design architecture and workflows to employ AI optimization
• Build datasets for AI to improve design accuracy
Requirements:
• Bachelor’s or Master’s in a related field
• 5-10 years of in-depth experience
• Advanced knowledge of SystemVerilog and Python
• Familiarity with AMD/Xilinx and Altera/Intel workflows
• Strong communication and troubleshooting skills
Join Cognichip to pioneer the future of AI and silicon design in Toronto.
#J-18808-Ljbffr
This hybrid role involves high-level collaboration across engineering disciplines, and you will design libraries, benchmarks, and ecosystems essential for enhancing design workflows. With 5-10 years of hands-on experience in RTL design, you will apply your skills in developing robust testbenches and automating design processes using SystemVerilog and Python. Engage with a talented team to push the boundaries of AI in chip technology.
Key Responsibilities:
• Translate silicon design constraints with cross-functional teams
• Develop and maintain RTL libraries and benchmarks
• Create verification environments using industry tools
• Design architecture and workflows to employ AI optimization
• Build datasets for AI to improve design accuracy
Requirements:
• Bachelor’s or Master’s in a related field
• 5-10 years of in-depth experience
• Advanced knowledge of SystemVerilog and Python
• Familiarity with AMD/Xilinx and Altera/Intel workflows
• Strong communication and troubleshooting skills
Join Cognichip to pioneer the future of AI and silicon design in Toronto.
#J-18808-Ljbffr