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Our client is a Toronto-based semiconductor design firm specializing in advanced analog and mixed-signal integrated circuits. They are known for tackling highly complex design challenges, collaborating across disciplines, and pushing innovation in next-generation IC development.

This role is ideal for someone who thrives at the intersection of CAD automation, advanced technology nodes, and hands-on problem solving. You will work alongside analog, digital, and layout teams to optimize custom flows, accelerate design productivity, and support world-class mixed-signal development.

Cutting-Edge Work
You will be directly involved in next-generation IC design, supporting leading-edge nodes and contributing to design automation critical to high-performance, high-precision silicon.

Learning & Growth
The environment moves quickly—engineers learn fast, share knowledge, and continuously evolve their technical depth.

Global Impact
Mixed-signal and analog ICs developed here are deployed worldwide, influencing real-world products and technologies.

Multidisciplinary Collaboration
Work closely with layout, digital, analog, modelling, and system teams to refine flows and create best-in-class solutions.

Customer & Foundry Exposure
Gain experience presenting design approaches, interfacing with fabs, and supporting end-to-end tape-out activities.

• Evaluate, set up, customize, and define PDK flows for advanced process nodes.

• Develop and drive Custom Design Automation flows, including schematic entry, layout (color-aware, DPT/MPT), and parasitic extraction for transistor-level design.

• Model devices and simulate circuits using Synopsys Custom Compiler and PrimeSim XA.

• Perform physical verification tasks including DRC, LVS, and DFM.

• Execute electrical verification (EMIR, ERC, PERC) and reliability assessments.

• Characterize analog cells and verify reliability and performance.

• Bridge digital and analog/mixed-signal design methodologies.

• Develop automation scripts, customize rule decks, and enhance overall design productivity.

• Train design teams on CAD tools, flows, and methodologies.

• Troubleshoot simulation, DRC/LVS, EMIR, and post-layout flow issues.

• Support tape-outs, run final chip finishing processes, and interface with foundries or customers regarding rule sets.

• Report directly to the IP Modeling leadership team.

• Bachelor’s degree in Electrical/Electronics Engineering or related discipline.

• 2–5 years of experience as a CAD Automation Engineer.

• Experience working with advanced technology nodes (7nm, 5nm, 4nm, 3nm, etc.).

• Exposure to multiple foundries (e.g., TSMC, Samsung) and relevant design methodologies.

• Solid knowledge of analog/mixed-signal design within Synopsys or Cadence environments.

• Strong familiarity with industry file formats and standards (SPICE, CDL, LEF/DEF, Verilog, SPEF, GDS, OA, LIB).

• Proficiency with scripting languages such as TCL, Python, C-shell, PERL, etc.

• Experience with design data management systems (Git, SVN, IC Manage, Cliosoft, Perforce, Methodics).

• Understanding of FinFET technologies (14nm → 3nm).

• Experience with deep sub-micron challenges (<45nm).

• Familiarity with job submission systems and tool monitoring.

• Understanding of EDA license features and basic license administration.