Come join Intel Labs, Intel's premier research group, and experience a world of opportunity!
The Microprocessor & Programming Research (MPR) group within Intel labs has a challenging mission to develop microprocessor and programming technologies that enable computing experiences of the future with breakthrough improvements in algorithms, performance, efficiency, reliability and cost.
As a CAD/Design Automation Engineer in the MPR Lab at Intel Labs, you would be responsible for setup and developing backend design flows for an advanced cpu architecture research and development in Intel Labs. We are a group of high energy and enthusiastic teams with a charter to develop next generation architecture with improved power vs. performance targets.
We are seeking individuals who are excited to be in the area of design automation for improving efficiencies. Responsibilities for this position would include but not be limited to:
- Setting up backend CAD tools and design databases
- Developing CAD software/flows to automate physical layout design and verification
- Developing physical design methodologies/guidelines and deliver layouts based on your understanding of advanced CMOS process technologies and circuit requirements
- Help design and develop new tools for automated and interactive back-end estimation
- Drive RTL-to-layout synthesis and Place & Route flows
- Work in conjunction with company level Design Automation organizations and design engineers to perform problem exploration, feasibility studies, option analysis, and establish best known methods
- Enable post silicon debug and test automation
- Own tapeout process modules that transform chip design data to mask data
- Make projections for the required resources
- Regular presentation of work and status to the project level meetings
The ideal candidate should exhibit behavioral traits that indicate:
- Good presentation skills; should be able to present to the larger team
- Strong verbal and written communication due to interaction with DA organizations located globally and across multiple times zones
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through relevant previous job and/or research experiences.
- Must have a Bachelors or Master's in Electrical Engineering, Computer Engineering, Computer Science or a similar technical discipline
- Minimum 2 years of experience with VLSI and ASIC design
- Minimum 2 years of experience with solid-state physics and electronics
- Minimum 2 years of experience with statistical data analysis, design of experiments and failure mode engineering analysis
- Minimum 3 years of experience with the following skill sets:
- UNIX and at least two programming language (i.e., Skill, C, C++, Perl, Tcl, Python, Matlab, Labview, and/or Java)
- Digital/analog layout, block and fullchip floorplanning, and design rule verification
- Standard EDA tools for circuit simulation, timing analysis, extraction and power grid analysis
- Physical design automation applications run in a Linux* environment
- Mask tapeout, tapeout rule checks and data processing
- 2+ years of experience with programming, including standard search, sort, and graph algorithms
- 2+ years of experience with software design practices including prototyping, modular design, design for testability and design for extension
Please apply here - http://www.intel.com/jobs/jobsearch/index.htm?job=702240
OR refer or email resumes to email@example.com
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About Intel Corporation:
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