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SOC ASIC Design Engineer

Technical Responsibilities

  • MUST have SOC integration experience with ARM sub system.
  • Must be familiar with ASIC/FPGA design flow including placement and routing, gate level simulation.
  • Must be familiar with ASIC development, synthesis, timing verification and functional verification
  • Must be familiar with design verification experience; developing test plan, test bench, assertions, functional & code coverage.
  • MUST have excellent interpersonal and communication skills.
  • Prefer to have Chip bring-up and lab experience.

Technical Qualifications

  • Must be proficient in Verilog HDL, Perl script, and C.
  • Knowledge of SOC, ARM processor, AMBA bus, peripherals.
  • Good communication with chip designer/software engineers.
  • Open minded, quick learner, able to solve problems in a complex system.
  • Must be self-motivated and comfortable working independently.

Educational Requirements

  • Bachelor’s degree in Electrical Engineering, Masters degree in Electrical Engineer or PhD preferred

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