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Engineer, ASIC Design Qualifications: Proficient in digital design - RTL, Verilog, verification, synthesis, timing closure
Good communication. Team player.
MSEE Preferred.
Description: Design Engineer responsible for the design, verification, and evaluation of digital circuits in high-speed data communication ICs. Duties include specification, design, RTL coding, verification, synthesis, timing, chip integration, test pattern development, post silicon debugging. Knowledge of Ethernet physical layer, PCIE, SERDES a plus but not required. SOC integration experience a plus.

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