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18252 Engineer: ASIC Verification – III - Intel HDK/ACE environments

Staff Finders Technical Inc. Santa Clara, CA
  • Expired: over a month ago. Applications are no longer accepted.

Req# / Job Title: 18252 Engineer: Verification – III

Duration: 2020-02-17 to 2020-07-17

Location: Santa Clara, CA

Job Description:


We are Iooking for an individual to fill a position for a Iogic - Verification engineer. Candidates must have experience performing ASIC - Verification based on architectural/micro-architectural specification review and analysis followed with definition of - Verification requirements.
The person in this position will also have the following responsibilities: Develop tests and test bench components from high Ievel - Verification plans, as well as debug of failing tests, definition of functional coverage space, implementation of coverage monitors and analysis of test coverage space, regression running and debugging failing tests, design and development of test bench collateral.
Team members will also work closely with design and architecture teams to review and refine test and coverage requirements. candidates.
Requirements:
Experience in the following aspects of Front End Verification
1. Knowledge of Intel HDK and ACE environments a huge positive and advantage
2. System Verilog based testbench development
3. In-depth knowledge of OVM
4. Knowledge of converting from OVM to UVM
5. Development of verification environments
6. System Verilog based assertion development
7. System Verilog based IP verification sequences
8. Very good Debugging skills using Synopsys VCS and Verdi
9. Developing and Debugging Synthesizable Transactors
10. Perl coding for developing simple flows
11. UNIX Shell scripting for quick script development
-Experience in ASIC Iogic - Verification and strong software skills with experience using 1 or more of the following Ianguages: System - Verilog/Verilog, Perl,
-Candidates should also have experience with RTL simulators, - VCS preferred, experience specifying and developing test bench components, specifying, developing, and debugging functional tests, and experience specifying, implementing and analyzing functional coverage.
-Minimum Education: BSEE/CE minimum, MS preferred.
Preferred skills:
Strong debug abilities, good interpersonal skills and the ability to work in a highly cooperative team environment across many time zones are also desirable.
A strong background specifying and developing random test environments is also desired.

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