Logic Design Engineer
Spin Memory Fremont, CA
- Posted: over a month ago
Spin Memory is at the forefront of innovation with our breakthrough MRAM technologies that are enabling the electronics, digital applications and devices of tomorrow. Join our team of world-class magnetics, circuits and memory architect experts and discover what we can do together.
The Logic Design Engineer will own or participate in the definition, design, verification, and documentation for digital logic systems on integrated circuits. This includes developing architecture, module interfaces, and design approaches used in creating logic designs, register transfer level models, and simulating functional units and subsystems included in the development of complex multidimensional designs.
- Architecture and Definitions: Converting customer and product requirements into detailed design goals to be used in implementation.
- RTL ownership: Development, assessment and refinement of RTL design to target power, performance, area and timing goals
- Validation: Support test-bench development and simulation for functional and performance verification
- Performance exploration and correlation: Explore high performance strategies and validate that the RTL design meets targeted performance
- Design delivery: Work with cross-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power
Candidate should possess a Bachelor or Master of Science degree in Computer or Electrical Engineering with 5+ years of directly relevant experience
- Thorough knowledge of chip architecture
- Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools
- Knowledge of logic design principles along with timing and power implications
- Understanding of low power design techniques
- Understanding of high performance techniques and trade-offs
- Hands on experience in logic synthesis and integrating RTL driven logic into the full chip
- Hands on experience in integrating acquired IP blocks into a synthesized design
- Familiarity with FPGA emulation techniques
- Experience in C or C++ programming and other programming languages such as Perl or Python
- Ability to generate library models (.lib) for embedded macro use
- Ability to generate memory BIST models for use with MBIST tools
- Experience with memory BIST generation and usage for embedded macros
- Ability to generate Verilog models for use by customers in their simulation environment
Were Focused On Your Success.
Based in Fremont, just a few miles east of Silicon Valley, we offer competitive pay, a broad range of benefits and an exciting team-oriented environment. Whether you are working in our fab, designing new technologies or creating new devices, every team member is important as we advance MRAM technologies for high performance, low power applications.