SOC Design Verification Engineer
CyberCoders Seattle, WA
- Posted: over a month ago
- $200,000 to $500,000 Yearly
remote during covid, then on-site in San Francisco when available (GREAT Relocation packages available)
These jobs require experience with ASIC / FPGA verification using SystemVerilog / UVM.
These roles are remote during Covid and have incredible relocation packages when on-site becomes available.
These companies have built a team around the technology already and the project has had great success.
They are now looking to add multiple positions to this growing team which I will outline below.
Skills in ASIC / FPGA verification (directed test or SystemVerilog / UVM)
Basic knowledge in design techniques Verilog or VHDL
Good knowledge of simulation flow
Good basis in scripting Python, Perl, Bash
- SOC Design Verification Engineer
- simulation flow
Applicants must be authorized to work in the U.S.
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